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ADRV9008-1 malfunction

Category: Hardware

Hello ADI team,

I am working on several ADI cards such as ADRV9008-2, ADRV9008-1, ADMV1013-EVALZ, ADMV1014-EVALZ etc.
I am very tired of the ADRV9008-1 reception card. Indeed, each time I load it by clicking on ''program'', it displays errors. I am obliged to load it several times so that it passes (often at least 20 times). I attached a screen capture of the error message displayed.
Then, I used the tool '' Talise configuration wizard '' to increase the frequency of sampling of the modules ADRV9008-2 and ADRV9008-1. for the module ADRV9008-2 passed correctly. But for the module ADRV9008-1, it refuses. Even though I respected all that was said in the tool. here is the configuration I made in the tool. When I load in the ADRV9008-1, the device clock refuses to take the value 184.32 MHz. it always remains at 122.88 MHz.
Even when I make another configuration or set the device clock to 307.2 MHz, it always remains locked at 122.88 MHz.

<profile Talise version=1 name=Rx_BW200_OR368p64>
<clocks>
<deviceClock_kHz=184320>
<clkPllVcoFreq_kHz=7372800>
<clkPllHsDiv=2.0>
</clocks>

<rx name=Rx 200.00MHz, OutputRate 368.64MHz, TotalDecimation 5>
<rxChannels=TAL_RX1RX2>
<rxFirDecimation=1>
<rxDec5Decimation=5>
<rhb1Decimation=1>
<rxOutputRate_kHz=368640>
<rfBandwidth_Hz=200000000>
<rxBbf3dBCorner_kHz=200000>
<rxDdcMode=0>

Could you help me to solve the two problems I have on the ADRV9008-1 module?

Parents
  • did you update the AD9528 clock setup section before programming? Please share your profile so that I can check.

  • Hello and thank you for your quick reply

    Yes I have updated the reference clock and the VXCO. By the way, I use the same frequency generator to power both modules (ADRV9008-2 and ADRV9008-1). The ADRV9008-2 works correctly with the changing profile. This means that it is not the AD9528 clock.

  • Below, I put in image the configurations of the ADRV9008-1. My objective is to use the maximum value of the sample frequency of the module.
    According to the datasheet the maximum value of sample frequency of the ADRV9008-1 is 370 MHz. So I chose 368.64 MHz in order to use the same refA and the same vcxo by default. Because, I observed that the sample frequency value is a multiple of the refA. So I chose a sample frequency value that allowed me to generate a refA = 30.72 MHz and vcxo = 122.88 MHz.
    But when I load the new configurations, the device clock of the ADRV9008-1 remains on the value 122.88 MHz even if I chose a device clock value = 184.32 MHz.

    What I don't understand is that the same method i used to generate the profile of ADRV9888-2 works correctly.

  • But when I load the new configurations, the device clock of the ADRV9008-1 remains on the value 122.88 MHz even if I chose a device clock value = 184.32 MHz.

    Can you share with us the profile in .txt format so that we can load and check. 

  • Yes its a bug with the tool. Are you working on ADRV9008-1 or adrv9008-2?

    If you proceed with changing the DEV_CLK parameter in the config files generated from the GUI, and then try initializing the chip with the modified config files, are you succesfully program the chip?

     As a workaround, can you try with a different DEV_CLK? Generate a profile from filter wizard with say 92.16MHz DEV_CLK, and then load it into TES GUI. 

  • I work on both modules.
    I use both modules in my work. I use the ADRV9008-2 as my transmitter and the ADRV9008-2 as my receiver. However, the ADRV9008-1 module causes me a lot of fatigue.
    My goal is to use a very high sample frequency. The maximum sample frequency value in the default configuration is 245.76 MSPS. So I try to use the tool to increase the sample frequency.
    So how can I use the FS = 368.64 MSPS?

    Translated with www.DeepL.com/Translator (free version)

  • I work on both modules.
    I use both modules in my work. I use the ADRV9008-2 as my transmitter and the ADRV9008-2 as my receiver. However, the ADRV9008-1 module causes me a lot of fatigue.
    My goal is to use a very high sample frequency. The maximum sample frequency value in the default configuration is 245.76 MSPS. So I try to use the tool to increase the sample frequency.
    So how can I use the FS = 368.64 MSPS?

  •  As a workaround, can you try with a different DEV_CLK? Generate a profile from filter wizard with say 92.16MHz DEV_CLK, and then load it into TES GUI. 

    Keep the same sampling rate as 368.64Msps, but try generating profile with a different DEV_CLK say 92.16MHz(instead of the 184.32MHz DEV_CLK) from the GUI. Then load the same profile in the ADRV9009 TES GUI and then generate the config files. The GUI will take that 92.16MHz DEV_CLK correctly.

  • When I set the device clock to this or another value, this is the message that appears. You can see the message on the picture.
    I conclude that the ADRV9008-1 module that I use wants only the devices clock displayed in the picture. But even when I take the value 122.88 MHz, the module refuses to load.
    Is there any way to reprogram the module ?
    Because frankly, it tires me

  • The GUI only supports these DEV_CLK frequencies, because the AD9528 clock chip supports only these DEV_CLK with a VCXO of 122.88Msps. You can try by generating the config files from the TES GUI in demo mode(python or initdata.c files) with the DEV_CLK of 92.16MHz as below :

    Then you try to use these same config files, and manually configure the AD9528 chip to ensure that it is giving out a dev_clk of 92.16MHz and then try initializing the chip. Else, you can also generate the config file in  python format and then load into the Iron Python tab in GUI and then try programming with the same configuration. 

  • Hi Sir,

    How to generate the code for the demo mode(python or initdata.c files) ?
    When I click, I am told to import a file that should contain the code. But I don't know how to write the code. And I searched in all the official documents I found on the Analog Device website.

Reply Children
  • When I click, I am told to import a file that should contain the code. But I don't know how to write the code.

    Load the config files generated from filter wizard with 92.16MHz dev_clk and then generate init files from the GUI using the tools tab in python format as below:

    ...

    Then, load the same python file into the GUI and then try running the same script:Make sure that correct dev_clk of 92.16MHz is going to the chip.