In the SDK package there is a Changelog.txt file that details all known additions, changes and bugs at the time of release. This page contains a list of SDK and TES Errata found after release, which will be updated as each bug is reported or resolved.
Last Edited: 17 February 2023
|Errata||Date logged||SDK version||Fix in SDK|
|New Line At End Of File Causes TES Error||17 - Feb - 23||22|
|Autogenerated Python Sample Code||02 - Feb - 23||22|
|CLGC in FDD mode freezes when Tx and Rx are both enabled||09 - Jan - 23||20||22.1|
|Program failure when using DPD in some profiles||09 - Jan - 23||21|
|FPGA source code not included||31 - Aug - 21||17||17.1|
|MCS Operation not working||31 - Aug - 21||17||17.1|
|Segmentation fault due to large memory allocations on the stack||1 - June - 21||16||18|
|MCS profile configuration crashes the TES||14 - Oct - 21||18||18.1|
New Line At End Of File Causes TES Error
When loading a file to TES e.g. FH table, that has a new line (carriage return) at the end of the file, TES will report an error: Exception has been thrown by the target of an invocation
Customer can manually remove the new line from the file and reload the file in TES.
Autogenerated Python Sample Code
Autogenerated sample code may not run in some circumstances without changes. Work is on going to determine the root cause of the issue.
Occasionally the interpreter will return a SystemError at the line "board = platform.Boards"
Changing this to "board = platform.CustomerBoard" has been known to resolve this issue.
Note: The "import clr" line currently requires a pythonnet version of 2.5.2 or older (at time of writing, version 3 and newer will not work).
Additionally, it is important to ensure that the TES version used to produce the sample code is the same as the version that copied the server files onto the FPGA SD card. This can be ensured by removing the folder "/home/analog/adrv9001_server", then connecting with the TES that is used to generate the sample code.
CLGC in FDD mode freezes when Tx and Rx are both enabled
When using CLGC in FDD mode, CLGC freezes when both Tx and Rx are enabled together.
A fix will be available shortly for this bug.
Program failure when using DPD in some profiles
An error is reported when trying to program transceiver when using DPD under certain profiles e.g. 9.6 MSPS.
A fix will be available shortly for this bug. It is still possible to use these profile without DPD and it is also possible to use DPD in other profiles.
FPGA source code not included
FPGA source code was omitted from the SDK 17 release.
Users can download a new release of SDK from the product page (version 17.1) that has the FPGA source code included.
This is fixed in SDK 17.1
MCS Operation not working
MCS operation in SDK version 17 did not function as expected and as a result was not useable.
Users can download a new release of SDK from the product page (version 17.1) that has resolved this issue.
This is fixed in SDK 17.1
Segmentation fault due to large memory allocations on the stack
By default, ADI_FPGA9001_MAX_CAPTURE_BYTES is set to the absolute maximum supported by the FPGA. This may cause a segmentation fault due to large memory allocations on the stack.
This can be resolved by either:
Modify the makefile CFLAGS to include -DADI_FPGA9001_USE_DYNAMIC_MEMORY. This makes the ADI_FPGA9001_MAX_CAPTURE_BYTES value irrelevant, instead allocating memory on the heap.
Modify the value of ADI_FPGA9001_MAX_CAPTURE_BYTES to be smaller - ideally only as large as the largest required data capture/transmit
This is fixed in SDK 18
MCS profile configuration crashes the TES
When programming a configuration that includes Multi-Chip Synchronization the TES GUI will crash. This is caused by a timer timeout issue in the FW and is currently being looked at.
Currently stay using SDK version 17 to test the MCS function. An update will follow shortly to fix this in the SDK 18.
This is fixed in SDK 18.1