We are developing a custom board to use Xilinx Zynq MPSoC with ADRV9002. We are planning to use TES to test the performance and functionality of our custom board.
Questions:
1. Where can I find the HDL source/constraints for the Zynq MPSoC ZCU102 PL design for use with TES (ADRV9001-SDK v0.20.0), so that I can retarget pin constraints for our custom board?
2. What version of Vivado was used to build the ZCU102 PL image for use with TES (ADRV9001-SDK v0.20.0)?
3. Can you point us to a repo used to build from source the embedded Linux ZCU102 images downloaded as part of ADRV9001-SDK v0.20.0 disk imaging tool?
Thank you!