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ADRV9002 Custom Board: FPGA HDL source and Embedded Linux

Category: Software
Product Number: ADRV9002
Software Version: TES 0.20

We are developing a custom board to use Xilinx Zynq MPSoC with ADRV9002. We are planning to use TES to test the performance and functionality of our custom board.

Questions:

1. Where can I find the HDL source/constraints for the Zynq MPSoC ZCU102 PL design for use with TES (ADRV9001-SDK v0.20.0), so that I can retarget pin constraints for our custom board?

2. What version of Vivado was used to build the ZCU102 PL image for use with TES (ADRV9001-SDK v0.20.0)?

3. Can you point us to a repo used to build from source the embedded Linux ZCU102 images downloaded as part of ADRV9001-SDK v0.20.0 disk imaging tool?

Thank you!

  • Hi Sloth1234,

    The idea of TES is not really for the purpose you are trying, however we provide all the codes you need if you want to do it.

    Typical workflow would 1) to evaluate, and generate source code with TES using ADI reference design 2) and port that generated code onto your hardware. 

    To answer your questions,

    1. You will find complete HDL source code and also source code for embedded linux components that are required to build the image of the SD card in the following folder of the SDK20, 

       - adrv9001-sdk/pkg/prototype/platform

    2. Vivado 2019.2.1 is used.

    3. We provide the SDK only through the product page in our web site. We don't maintain github or other channels for this particular software. 

    Please note that HDL code is provided as an example without further support and I hope you find it useful for your purpose.

    Regards,

    YH

  • Thank you for answering our questions! That was very helpful!

    I was able to rebuild the HDL and embedded linux components from source per your guidance.

    Note, I have not had a chance to test the images yet.

    Thank you!