EVM adrv9002 with the Xilinx ZYNQ ZC706 motherboard 1Rx 1Tx FDD with DPD application.

Hi,

I have some questions about the EVM adrv9002 with the Xilinx ZYNQ ZC706 motherboard.
I would like to config 1Rx, 1Tx FDD with DPD, can the evaluation platform be able to do a loopback test with 8 modulation carriers input to Rx then loop back to Tx output with DPD activation for verification performance.

Regards,

Douglas

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  • +1
    •  Analog Employees 
    on Oct 28, 2020 10:41 AM

    Hi Douglas,

    The setup you're describing is actually very similar to one described in the User Guide: ADRV9001 Example Usecases

    The important thing to note here is that even though you're only intending to use 1 Rx channel to receive data, you need to leave one Rx free to perform DPD. This ORx (Observation Rx) must be adjacent to the intended Tx (ORx1 -> Tx1, ORx2 -> Tx2). This will mean that, as with the diagram, your actual data will be sent from Tx1 and received on Rx2. This will mean that your data loopback will have to be external, as there are no internal loopbacks from Rx2 to Tx1.

    Once you've accounted for these setup constraints your application will be more than possible using the ADRV9002. 

    Let us know if you have any more questions.

    Best Regards,

    Oisín.

  • Hi Oisin,

    The question was if the ADRV9002 Evaluation board connected to the ZYNQ ZC706 motherboard would the platform firmware support external loopback testing from Rx2 to Tx1 + DPD (Rx1) as per the config diagram above? We would like to evaluate the DPD performance with different modulation and multiple carriers and spacing from the signal generator via Rx2.  

    Can we be able to evaluate the DPD performance with P25P2: TDMA? 

    H-CPM (constant envelope) in a 12.5 kHz channel

    H-DQPSK (non-constant envelope), i.e. has a PAPR of 2.6 dB in a 12.5 kHz channel

    Could you please confirm whether the current platform firmware support only data files transfer for Tx1 and Tx2  (stored on the ZYNQ ZC706 RAM).

    Best Regards,

    Douglas Tran

Reply
  • Hi Oisin,

    The question was if the ADRV9002 Evaluation board connected to the ZYNQ ZC706 motherboard would the platform firmware support external loopback testing from Rx2 to Tx1 + DPD (Rx1) as per the config diagram above? We would like to evaluate the DPD performance with different modulation and multiple carriers and spacing from the signal generator via Rx2.  

    Can we be able to evaluate the DPD performance with P25P2: TDMA? 

    H-CPM (constant envelope) in a 12.5 kHz channel

    H-DQPSK (non-constant envelope), i.e. has a PAPR of 2.6 dB in a 12.5 kHz channel

    Could you please confirm whether the current platform firmware support only data files transfer for Tx1 and Tx2  (stored on the ZYNQ ZC706 RAM).

    Best Regards,

    Douglas Tran

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