AD9371 PLL set up error

I am trying to set up the AD9371 on a custom board and am running into errors.  I used the Filter wizard v1.8 to create a custom profile and imported that into the TES software tool to export the c files for API set up.  When I run it goes error free until I get to the call to MYKONOS_setRfPllFrequency with TX_PLL as a parameter.  This function call returns the error MYKONOS_ERR_SETRFPLL_ARMERROR.  Stepping into the call it is the call to MYKONOS_waitArmCmdStatus that returns an error of MYKONOS_ERR_ARMCMDSTATUS_ARMERROR with a value for cmdStatusByte of 0x8.  A previous call to MYKONOS_setRfPllFrequency with RX_PLL as a parameter succeeds.

  • I tried using a standard profile as well with the same results

    <profile AD9371 version=0 name=Rx 82, IQrate 100.000>
    <clocks>
    <deviceClock_kHz=100000>
    <clkPllVcoFreq_kHz=12000000>
    <clkPllVcoDiv=3>
    <clkPllHsDiv=4>
    </clocks>

    <rx>
    <adcDiv=1>
    <rxFirDecimation=2>
    <rxDec5Decimation=5>
    <enHighRejDec5=1>
    <rhb1Decimation=1>
    <iqRate_kHz=100000>
    <rfBandwidth_Hz=82000000>
    <rxBbf3dBCorner_kHz=82000>

    <filter FIR gain=-6 num=48>
    -7
    -30
    39
    55
    -77
    -122
    157
    218
    -275
    -374
    459
    600
    -725
    -932
    1114
    1421
    -1694
    -2174
    2655
    3470
    -4840
    -7545
    9702
    32260
    32260
    9702
    -7545
    -4840
    3470
    2655
    -2174
    -1694
    1421
    1114
    -932
    -725
    600
    459
    -374
    -275
    218
    157
    -122
    -77
    55
    39
    -30
    -7
    </filter>

    <adc-profile num=16>
    655
    475
    201
    98
    1280
    498
    1593
    284
    1061
    86
    643
    28
    48
    31
    18
    191
    </adc-profile>
    </rx>

    <obs>
    <adcDiv=1>
    <rxFirDecimation=2>
    <rxDec5Decimation=5>
    <enHighRejDec5=1>
    <rhb1Decimation=1>
    <iqRate_kHz=100000>
    <rfBandwidth_Hz=82000000>
    <rxBbf3dBCorner_kHz=41000>

    <filter FIR gain=0 num=48>
    -1
    -24
    22
    41
    -42
    -92
    92
    161
    -164
    -274
    280
    435
    -447
    -672
    695
    1019
    -1064
    -1556
    1676
    2523
    -2991
    -5635
    4397
    18298
    18298
    4397
    -5635
    -2991
    2523
    1676
    -1556
    -1064
    1019
    695
    -672
    -447
    435
    280
    -274
    -164
    161
    92
    -92
    -42
    41
    22
    -24
    -1
    </filter>

    <adc-profile num=16>
    655
    475
    201
    98
    1280
    498
    1593
    284
    1061
    86
    643
    28
    48
    31
    18
    191
    </adc-profile>

    <lpbk-adc-profile num=16>
    737
    439
    201
    98
    1280
    112
    1505
    53
    1081
    17
    667
    40
    48
    33
    19
    194
    </lpbk-adc-profile>
    </obs>

    <tx>
    <dacDiv=2.5>
    <txFirInterpolation=1>
    <thb1Interpolation=2>
    <thb2Interpolation=2>
    <txInputHbInterpolation=1>
    <iqRate_kHz=100000>
    <primarySigBandwidth_Hz=33000000>
    <rfBandwidth_Hz=82000000>
    <txDac3dBCorner_kHz=92000>
    <txBbf3dBCorner_kHz=41000>

    <filter FIR gain=6 num=16>
    36
    -248
    150
    -121
    -107
    892
    -2637
    20149
    -2637
    892
    -107
    -121
    150
    -248
    36
    0
    </filter>
    </tx>
    </profile>

  • My profile doesn't use a clock that is compatible with the eval board so I can't load it using the TES GUI.  I am using the latest

  • 0
    •  Analog Employees 
    on Jul 28, 2020 8:31 AM 5 months ago in reply to HazenLP

    Can you please check whether the AD9528 device programmed properly and outputs the intended frequency at the reference clock input of AD9371?

  • This is a custom board so the clock isn't being generated by an ad9528 but I have verified that we do indeed have the specified 100MHz clock at the reference clock input to the ad9371

  • 0
    •  Analog Employees 
    on Jul 29, 2020 10:11 AM 5 months ago in reply to HazenLP

    Can you please share the init files that you generated from TES GUI?

    What is the version of the HDL and No-oS driver you are using?

    Did you check with any other device clock and other LO frequency?

    If you are able to configure the Rx PLL successfully can you please read back the lock status?

    Are you able to configure the sniffer PLL?