I am using VCU118 board + AD9082 with setup as shown in link wiki.analog.com/.../microblaze but with AD9082 board.
The aim is to bring up the two ADC of 9082 for 2GHz bandwidth and transmit the sampled data onto JESD204C.
I am refering to UG1578 and API (api v1.2.2 commit 5b813df for ad9082) for my development.
I have integrated the API source with my HAL code for SPI access (spi_xfer) and tx_en_pin_ctrl.
I am feeding 4.4GHz into the EXT_CLK of AD9082 as shown in red circle in below image.
In the API provided, I am unable to find the function and arguments to call to enable EXT_CLK directly for AD9082.
It is requested to provide list and order of registers to be set to enable EXT_CLK directly as shown in red color path for DACCLK.
for more details https://ez.analog.com/wide-band-rf-transceivers/mixed-signal-front-ends-mxfe/f/q-a/559238/unable-to-configure-adc-using-api-in-vcu118-ad9082-ug1578-register-information-missing-in-table-195 may be looked into.
Added Image to show the exact path required for PLL clock.
[edited by: faiz321 at 3:57 AM (GMT -4) on 6 Jun 2022]