Does the AD9082 support JESD204C FEC?
Also, does Analog have any data on the expected BER rate of the SERDES links, for example a measurement from the EVM?
Thanks for the update.
BER of 1e-15 does not sound great for a link which runs at 15GBps! Each link would be expected to get a bit error every day!
Hopefully the BER can be reduced with some careful board / transceiver optimisation...Will look into the IBIS-AMI models.
the JESD204 specification has a minimum specification of 1E-15. this applies to both JESD204B and JESD204C modes. That said, our designs are capable of much better BER. A lot of factors can impact BER. For example, a poorly laid out interface could result in a worse BER. A reduction in line rate can improve the BER, as can a shorter, well designed PCB trace.