AD9081

Markze said:

In datasheet of AD9081, the maximum speed of SERDES JESD204B interface is 15.5Gbps. Might I know if you have any advice regarding to the high speed circuit?

please take a look at the AD9081-FMCA-EBZ board layout. this board supports line rates up to 24.75Gbps and is sufficient to support JESD204B full line rate.

Markze said:

I find AD9081 guide – UG-1578. Page.184 has the layout guide for JESD204B/C SERDES Trace Routing and Page.225 has the JEDS debug guide.
Might I know if it is sufficient guide for JESD204 trace design?

yes.

Markze said:

We would like to achieve one DAC channel output with 12Gbps, but AD9081 DAC path supports many JESD204B/C modes - JESD_MODE. Might I know if any JESD204 mode you suggest to achieve DAC 12Gbps without interpolation?

in the user guide tables 88/89 you will find the supported modes. JESD204B mode 63 supports 3GSPS I/Q . JESD204C mode 18 supports 6GSPS I/Q data and mode 20 supports 12GSPS real data. 

Markze said:

BALH-0009SMG balun is recommended in AD9081 reference design. However, we find supplier alternative balun Macom - MABA-011082, which is smaller size and similar spec. Could you advise any guide for the balun selection?

s-parameters for the ADC inputs, DAC outputs and the clock inputs are available on the product page. you may use these models to simulate the front end network. the AD9988-FMCB-EBZ uses the TCM1-83X+. please see evaluation board user guide UG-1829.

Hi,

Thank for your feedback. Your advice is helpful.

For Q4 MABA-011082 balun advice, I am not familiar with the front end network simulation.

Might I know ADI has any recommended FOC SW for the simulation?

Appreciate your advice in advance.

Thank you.

Mark

Hi, we use Keysight ADS, but pretty much any simulator capable of handling s-parameter (or touchstone format) files (*.SnP) would work. I have used QUCS in the past. it is a good free tool.