I am trying to sync the NCO of CDDC0 and CDDC1 of AD9082.
From what i can tell, only the SYSREF sync option can do that, as the asynchronous reset via spi register is able to reset only one CDDC at the same time.
I am using subclass 0 for JESD so i need SYSREF only to sync the NCO.
I use a 1 MHz sysref signal output by the HMC7044 chip on the AD9082 FMC card
I tried to enable sysref logic with adi_ad9082_jesd_sysref_enable_set and adi_ad9082_jesd_sysref_spi_enable_set.
I enable the sysref reset with sysref reset with adi_ad9082_adc_ddc_coarse_sync_enable_set and adi_ad9082_adc_ddc_coarse_sync_next_set but it doesn't seem to be enough to sync the NCO.
I am checking COARSE_DDC_SYNC_EN_CLEAR flag, but i am not sure what it means. It is always 1 after i enable next sync with adi_ad9082_adc_ddc_coarse_sync_next_set.
I set the FDDC to ZIF to disable the channelizers NCO.
Thanks for helping me.
AD9082 is r2, i am using the bare metal no-OS driver