There are several modes in the AD9361 that can address TDD applications and it is important to pick the most effective mode for the application at hand. The ENSM and PLL sections of the user guide describe TDD switching as well. The ENSM guide also explains the SPI and the pin-control methods for controlling the ENSM and the LO.
Several factors affect how quickly the AD9361 can switch from Rx to Tx and vice versa including:
The Rx to Tx or Tx to Rx maximum switching time is different for each of the modes described below. Knowing the maximum time allowed by the application helps determine the best option.
I have an additional question about FDD Independent mode: as it says "However, the Tx DAC still powers up and down along with the rest of the Tx signal path". Does this mean it will still respect DAC power up time of 18us when moving to TX state? is this similar to Standard TDD mode/Dual Synth?
Yes your understanding is correct.