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RX Frame signal not coming

I am using fmcomms4, ad9364 along with the FPGA in dual port full duplex mode. Through SPI registers I am able to configure desired BBPLL, ADC CLOCK, DATA CLOCK AND CLOCK OUT. I have set the register 0x010 (D3->1), but I am unable to get RX Frame signal toggling at all; the state of the signal is always high. Please help me out in getting the signal.

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  • Hi.

    I am in the same situation with ad9361. I read the 0x010 . it was 0xc0.

    I does:

    if fpga :

    rx_path : 1

    tx_path : 1

    delay

    rx_path : 0

    tx_path : 0

    clk_per_sample : 1

    debug_mode : 1

    delay_sample : 35

    spi:

    3df = 1

    2a6 = e

    2a8 = e

    2ab = 2

    2ac = 10

    2ab = 7

    2ac = ff

    9 = 17

    45 = 0

    46 = 3

    4b = e0

    4e = 10

    44 = 26

    43 = ff

    42 = bf

    41 = c

    3f = 5

    3f = 1

    4c = 86

    4d = 1

    4d = 5

    3b = 20

    a = 34

    do you have any suggestion for me

    thanks

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