What can cause a drop of the bias voltage at the RX_EXT_LO_IN pin?

We have a design with two AD9361 and want to synchronize LOs by using an external LO. For this, I apply a sinus from a signal generator to the RX_EXT_LO_IN pins and set the appropriate registers. However, this doesn't work and while debugging we noticed that the bias voltage at our RX_EXT_LO_IN pins is only 0.03V instead of 0.5V as in the FMCOMM2 reference design. TX_EXT_LO_IN is grounded, but grounding the pin on the FMCOMM2 didn't cause a voltage drop. This voltage is generated chip internal, hence my question: What can cause a drop of the bias voltage at the RX_EXT_LO_IN pin?

Thanks!

- Thomas

Parents
  • If I do the SPIWrites for Rx Ext. LO the chip goes into a state where it just gives out the same sample over and over. The state continues even when writing back the old values. I write the registers via direct_reg_access in the following way:

    echo 0x005 0x77 > /sys/kernel/debug/iio/iio:device0/direct_reg_access
    echo 0x050 0x0f > /sys/kernel/debug/iio/iio:device0/direct_reg_access
    echo 0x057 0x0c > /sys/kernel/debug/iio/iio:device0/direct_reg_access
    echo 0x261 0x30 > /sys/kernel/debug/iio/iio:device0/direct_reg_access
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  • If I do the SPIWrites for Rx Ext. LO the chip goes into a state where it just gives out the same sample over and over. The state continues even when writing back the old values. I write the registers via direct_reg_access in the following way:

    echo 0x005 0x77 > /sys/kernel/debug/iio/iio:device0/direct_reg_access
    echo 0x050 0x0f > /sys/kernel/debug/iio/iio:device0/direct_reg_access
    echo 0x057 0x0c > /sys/kernel/debug/iio/iio:device0/direct_reg_access
    echo 0x261 0x30 > /sys/kernel/debug/iio/iio:device0/direct_reg_access
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