When using Matlab based filter wizard tool, I can get a different clock path compared to what I get in IIOscope when entering a sampling frequency.
The rule in IIOScope seems to be x2 at each decimator step, and so it is in ad9361's driver.
Why cant' we set the data path in IIOScope as designed?
For AD9361 device, is there a rule of thumb to resolve the value of ADC sampling? (aside of Shannon sampling theorem obviously). What is the minimum required?