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AD9361 Tx no output

Category: Software
Product Number: AD9361

With Zedboard and fmcomms2, I have built my project (HDL: 2019R1; sw: no_os_2019_R1). In the sw(config.h and main.c), I open the XILINX_PLATFORM, ADC_DMA_EXAMPLE and DAC_DMA_EXAMPLE micros, and I changed the rx_fir_config, rx_fir_config and default_init_param as follows. But when I observe the output of TX1A with an oscilloscope, I can't see the signal. 

What shoud I do to see the signal from the TX1A?

The rx_fir and the tx_fir which I set in the main.c are low pass filters.

AD9361_RXFIRConfig rx_fir_config = {
	3, // rx
	-6, // rx_gain
	2, // rx_dec
	{-12,-15,-22,-8,9,28,24,1,
	-28,-31,-2,42,57,21,-43,-76,
	-38,50,109,73,-44,-138,-111,36,
	177,169,-10,-210,-235,-26,247,321,
	86,-273,-419,-167,294,538,283,-297,
	-673,-434,280,832,641,-228,-1016,-916,
	130,1239,1302,48,-1522,-1873,-362,1926,
	2834,986,-2643,-4912,-2652,4728,14235,
	20875,20875,14235,4728,-2652,-4912,-2643,
	986,2834,1926,-362,-1873,-1522,48,1302,1239,
	130,-916,-1016,-228,641,832,280,-434,
	-673,-297,283,538,294,-167,-419,-273,
	86,321,247,-26,-235,-210,-10,169,
	177,36,-111,-138,-44,73,109,50,
	-38,-76,-43,21,57,42,-2,-31,
	-28,1,24,28,9,-8,-22,-15,-12}, // rx_coef[128]
	128, // rx_coef_size
	{983040000,491520000,245760000,122880000,61440000,30720000}, // rx_path_clks[6]
	25820686 // rx_bandwidth
};

AD9361_TXFIRConfig tx_fir_config = {
	3, // tx
	0, // tx_gain
	2, // tx_int
	{-8,-8,-10,5,22,35,27,1,-27,-28,1,40,51,15,-45,-73,-34,49,101,63,-47,-133,-103,37,167,156,-14,-202,-222,-23,234,302,79,-261,-398,-160,277,510,272,-277,-640,-422,255,789,622,-198,-961,-892,91,1167,1268,97,-1425,-1828,-435,1786,2774,1117,-2391,-4814,-3020,3802,13020,19902,20623,14819,5815,-1634,-4409,-2726,601,2535,1920,-146,-1666,-1495,-95,1142,1203,229,-789,-976,-299,535,790,329,-349,-632,-331,212,496,315,-111,-381,-286,40,284,250,8,-204,-211,-38,140,171,54,-90,-134,-59,52,100,57,-25,-70,-50,8,48,43,5,-26,-28,-2,24,36,24,8,-8,-7,-8}, // tx_coef[128]
	128, // tx_coef_size
	{983040000,245760000,245760000,122880000,61440000,30720000}, // tx_path_clks[6]
	22593011 // tx_bandwidth
};

AD9361_InitParam default_init_param = {

    ...
	/* Base Configuration */
	0,		//two_rx_two_tx_mode_enable *** adi,2rx-2tx-mode-enable
	...
	{983040000, 491520000, 245760000, 122880000, 61440000, 30720000},// rx_path_clock_frequencies[6] *** adi,rx-path-clock-frequencies
	{983040000, 245760000, 245760000, 122880000, 61440000, 30720000},// tx_path_clock_frequencies[6] *** adi,tx-path-clock-frequencies
	25820686,//rf_rx_bandwidth_hz *** adi,rf-rx-bandwidth-hz
	22593011,//rf_tx_bandwidth_hz *** adi,rf-tx-bandwidth-hz
	...
	}