ad9364 ENSM can't enter RX state?

lhzh7 on Mar 3, 2022

Dears,sir:

My AD9364 configurations are as below:

1. TDD mode (0x013=0x00)

2. To Alert = 1 (0x014=0x1D)

3. txnrx and Enable(level) by pin control. (0x015=08 or 0x0c)

After initial config done, the ENSM enter ALERT state. The reg 0x017=0x15. I set TXNRX = high, and then set ENABLE=high, the device enter TX state. The reg 0x017=16. And then set ENABLE=low, ENSM enter ALERT state,0x017=0x15.

But I set TXNRX=low, and then set ENABLE=high, ENSM cannot enter RX state, reg 0x017 is still 0x15. BOTH reg 0x015 =0x08 and 0x0c I have tried. It does not work.

Anyone can help me with this problem?

0 srimoyi

on Mar 4, 2022 10:13 AM
For the RX state, are you setting the TXNRX to low first and then doing the transition of the enable pin to high? Can you

Can you try in pulse mode?

Can you readback the RX or Tx states in real time using CTRL_OUT pins?
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0 lhzh7 on Mar 5, 2022 1:27 AM in reply to srimoyi

I have tried pulse mode, it does not work. The hardware does not support CTRL_OUT pins. I find that when I set the Rx Synth Ready Mask to 1 (0x015=0x1B), ENSM can enter RX STATE. If it means the rx synth VCO is not locked?

And I have a new problem, in tx mode, when I try to frequency hopping, (set 0x273,0x274,0x275,0x272,0x271,0x005), ad9364 can not enter TX mode, When I set Tx Synth Ready Mask to 1, it can enter TX mode. But sometimes,The LO frequency isnot right.
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0 srimoyi

on Mar 7, 2022 11:07 AM in reply to lhzh7
Why are you using register writes for frequency hop? We recommend to use either Linux or no-os drivers and use the API's for controlling the chip.

Refer to the below link for information on linux based API's:

https://wiki.analog.com/resources/tools-software/linux-drivers/iio-transceiver/ad9361

Readback the register 0x247 or 0x287 to check the PLL lock condition. If you configure in FDD independent mode, are you able to switch the RX/TX path on and off?
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