I understand that RF phase synchronization is not possible across multiple AD9361 chips; however, from reading your materials it sounds like this is mainly due to the div-by-2 array in the RF PLL. This makes it seem like the phase difference in 2 synchronized AD9361 chips would be predictable based on the division ratio. For example, if the RF frequency is set to 3 GHz - 6 GHz, it would be expected that the phase difference would always be either 0 or 180 degrees (assuming both RF paths are equal lengths), or a multiple of 90 deg if set between 1.5 - 3 GHz. Is this a correct assumption? If so, have you collected data showing this kind of phase difference predictability?