phase noise in increasing ref clk for AD9364


In reference manual's 14th page OF AD9364 mentions that " For optimum phase noise it is recommended to operate the scaled clock as close to 80 MHz as possible".

But As can be seen below photos, The lowest phase noise  is in 30.72 MHZ.  But in 40 mhz, phase noise are worse than in 30.72mhz. This is opposite data  according to above statement.. Could you clarify this? Thank you

Top Replies

    •  Analog Employees 
    Oct 6, 2020 in reply to gcetinkaya +1 verified
    n this statement 80 mhz,   is 80 Mhz  scaled clock

    Yes, it is scaled clock.

    The ref_clk after scaling should be close to 80MHz for best phase noise performance.