How to properly configure the AD9361 FIR to achieve good pulse shaping ?

Hi,

In order to meet our project requirements, we need to reach a symbol rate of at least 40MSps.

Our current architecture is based on the AD9361. However to achieve this symbol rate, the pulse shaping is to be integrated into the transceiver.

To validate the solution, we are using a FMCOMMS3 and ZC706 board.

The ZC706 is running the official image and we are configuring the AD9361 with the IIO oscilloscope application.

As test data, we are sending random QPSK data pre-computed in Matlab/Octave.

Initially, I wanted to use the FIR as a RRC pulse shaping filter with an oversampling of 4.

To configure the FIR, I computed the .ftr file manually, using a Matlab/Octave script (see below steps taken).

If I use the FIR filter using this .ftr (see below), the IIO configures it correctly (according to the IIO dashboard). However, we have a poor signal quality (measured in EVM: ~9%-10% or -20dB via a Signal Analyzer) coming out of the AD9361 :

If I use the same data, pulse-shaped with the same filter but this time directly in Matlab/Octave, therefore moving the pulse-shaping before the AD9361 (& disabling the FIR), we get a much cleaner signal (EVM ~1% or -40bB) (the rate has to be divided by 4 here since the pulse shaping is done upstream) :

Hence I think the computation of the .ftr file might be wrong.

I found very few data on how to generate such a file, so any insight/help would be much appreciated.

Here is how I currently generate it :

1) Compute the RRC FIR taps using the rcosdesign function of Matlab (beta = 0.35, span = 32, sps = 4), this generates 129 taps.

2) The FIR has only 128 coefficients, so I normalize the vector by the middle value and remove it. This gives me 128 symmetrical taps.

3) I convert these floating point taps into fixed point with variable gain in the following manner :

Tap n°64: 0.873582                                                                                                                                                                                                

Converted into 0000000000000000000000000000000011011111101000110001000111101000 / 3752006120 / 00000000DFA311E8. Error: 8.714196031434085e-11

This giving me a gain of 0dB.

4) I compute the maximum rate I can achieve :

    -> Since the FIR rate is limited to 120MSps, the max we can have with an oversampling of 4 is 30MSps

The RX filter is not really relevant, so I configure it as a lowpass.

This gives me the following file :

TX 3 GAIN 0 INT 4
RX 3 GAIN 0 DEC 4
RRX 960000000 480000000 240000000 120000000 120000000 30000000
RTX 960000000 240000000 120000000 120000000 120000000 30000000
BWTX 56000000
BWRX 56000000
-10,-86
17,130
27,-155
8,154
-21,-60
-29,179
-7,79
25,267
33,235
6,378
-30,360
-39,438
-9,382
31,373
39,252
5,158
-37,-13
-43,-145
-1,-304
47,-394
51,-462
2,-433
-56,-358
-61,-192
-5,3
58,241
61,450
-4,626
-73,706
-69,694
15,552
99,313
92,-19
-13,-378
-118,-728
-113,-992
7,-1132
126,-1092
112,-871
-39,-469
-176,59
-135,653
82,1211
274,1646
224,1858
-72,1788
-348,1400
-308,715
61,-205
398,-1240
286,-2245
-286,-3043
-762,-3468
-442,-3370
766,-2652
1954,-1275
1708,720
-661,3222
-4043,6050
-5642,8972
-2533,11731
6187,14072
18177,15772
28625,16666
28625,16666
18177,15772
6187,14072
-2533,11731
-5642,8972
-4043,6050
-661,3222
1708,720
1954,-1275
766,-2652
-442,-3370
-762,-3468
-286,-3043
286,-2245
398,-1240
61,-205
-308,715
-348,1400
-72,1788
224,1858
274,1646
82,1211
-135,653
-176,59
-39,-469
112,-871
126,-1092
7,-1132
-113,-992
-118,-728
-13,-378
92,-19
99,313
15,552
-69,694
-73,706
-4,626
61,450
58,241
-5,3
-61,-192
-56,-358
2,-433
51,-462
47,-394
-1,-304
-43,-145
-37,-13
5,158
39,252
31,373
-9,382
-39,438
-30,360
6,378
33,235
25,267
-7,79
-29,179
-21,-60
8,154
27,-155
17,130
-10,-86

--- END of .ftr file

For the following vector :

-0.000285
0.000543
0.000832
0.000254
-0.000623
-0.000876
-0.000184
0.000790
0.001026
0.000204
-0.000908
-0.001172
-0.000260
0.000949
0.001202
0.000173
-0.001119
-0.001287
-0.000026
0.001456
0.001585
0.000066
-0.001680
-0.001852
-0.000149
0.001775
0.001881
-0.000103
-0.002204
-0.002084
0.000469
0.003031
0.002816
-0.000372
-0.003575
-0.003439
0.000238
0.003864
0.003426
-0.001170
-0.005346
-0.004100
0.002510
0.008387
0.006848
-0.002170
-0.010612
-0.009374
0.001865
0.012158
0.008737
-0.008716
-0.023232
-0.013485
0.023379
0.059641
0.052134
-0.020146
-0.123366
-0.172168
-0.077298
0.188814
0.554723
0.873582
0.873582
0.554723
0.188814
-0.077298
-0.172168
-0.123366
-0.020146
0.052134
0.059641
0.023379
-0.013485
-0.023232
-0.008716
0.008737
0.012158
0.001865
-0.009374
-0.010612
-0.002170
0.006848
0.008387
0.002510
-0.004100
-0.005346
-0.001170
0.003426
0.003864
0.000238
-0.003439
-0.003575
-0.000372
0.002816
0.003031
0.000469
-0.002084
-0.002204
-0.000103
0.001881
0.001775
-0.000149
-0.001852
-0.001680
0.000066
0.001585
0.001456
-0.000026
-0.001287
-0.001119
0.000173
0.001202
0.000949
-0.000260
-0.001172
-0.000908
0.000204
0.001026
0.000790
-0.000184
-0.000876
-0.000623
0.000254
0.000832
0.000543
-0.000285

Is there indeed something off in the way my coefficients are computed ? Or is this to be expected when pulse-shaping is done in the AD9361 ?

This phenomenon was worse when I switched to a RRC with an oversampling of 2 to increase the rate.

As stated before, any insights or help is much appreciated.

Thanks for your help !

Antoine

  • Update on our situation :

    I was able to reduce the EVM further by changing the filter configuration. Instead of using the whole 128 taps of the FIR and breaking the asymmetry of the RRC filter, I truncate the RRC filter of 129 taps to 127, keeping its original asymmetry.

    This cause a significant improvement in term of EVM : at 20MSps we are down to 2% EVM :

    At 30MSps, the EVM is degraded to 3.5%. This I assume is due to a loss of interpolation due to the DAC's 320MSps limit.

    To achieve higher rate, I have to change the RRC filter to only work at an oversampling factor of 2 (please confirm, it seems that the FIR cannot output more than 120MSps). This further degrades the EVM to 5% at 40MSps.

    In summary this is what we currently have :
             1) 2% EVM at 20MSps
             2) 3.5% EVM at 30MSps
             3) 5% EVM at 40MSps
             4) 15% EVM at 61MSps
             5) 13.5% EVM at 41MSps

    My question is therefore now :

    Is that the expected performance or should we be able to get a better EVM (especially at higher rate >40MSps) ? The AD9361 specs advertise a 1% EVM but I assume this is achieved with an external pulse-shaping filter ?

    If so, where could we improve our design ?



    Thanks for help !

    Antoine

  • Thanks for the links !

    These are mostly on the computation of the .ftr coefficients however. I'll check them out to be sure that I'm configuring the FIR correctly.

    However these do not answer the question on the achieved performance in the post above :

    Is that the expected performance or should we be able to get a better EVM (especially at higher rate >40MSps) ? The AD9361 specs advertise a 1% EVM but I assume this is achieved with an external pulse-shaping filter ?

    If so, where could we improve our design ?

    Should I open another question ?

  • 0
    •  Analog Employees 
    on Apr 22, 2020 7:59 AM 7 months ago in reply to AntoineGauthier

    Just to confirm the steps that you followed for the creation of custom filter,

    1. Used the filter wizard to create custom filter file for the different sampling rateuse cases.

    2. then replaced the FIR filter coefficients with RRC filter.

    One point here is the filter wizard using FIR + Half band filters to get the required rejections and we use FIR gain to compensate for the droop in analog filter response to get a flat in band response.

    When you replace FIR with RRC that compensation for flatness may not be there and you need to keep the half bands as they are .in some cases you may not get the full 128 taps as explained below

    The Tx FIR uses DAC_CLK (Tx DAC sample clock) as its sample clock. DAC_CLK is either set equal to ADC_CLK or is set to ADC_CLK/2. The Tx FIR calculates 16 taps per clock cycle. This limits the number of available taps to the ratio of DAC_CLK to the input data rate multiplied by 16. For example, if the input data rate is 25 MHz and DAC_CLK is 100 MHz, then the ratio of DAC_CLK to the input data rate is 100/25 or 4. In this scenario, the total number of taps available is 64.

  • Indeed that's how I generate the custom filter.

    Thanks for the clarifications !

    This would explain why, using the same filter with a sample rate above 40MSps (where 96 taps only are used then) we see such degradation. We both loose a interpolation factor and our RRC filter is truncated.

    Moreover, I assume we don't even have a RRC filter anymore since it will use only the first 96 taps of the file ? What others compensation does the tool takes care of that I should be aware of ?

    However at 40MSps of input rate, the whole 128 taps should be available if the DAC_CLK is at 320MSps right ? Is then an EVM of 3-5% what you would expect for such a configuration ? Or do you think further improvements are possible ? 

    Thanks for your help !