I took the fmcomms2_kc705 design and modified it to fit on a custom designed Artix 7 board without DDR RAM, i.e. I removed the DDR blocks from the Vivado block design and added an interface to GTP transceivers. That's where I get the data I want to transmit with the AD9361. The problem is: when I flash the FPGA the transceiver link works perfectly. Then, when I run the software on the microblaze, the link over the GTPs get broken and the AD9361 is not booted. Without the GTP transceivers, i.e. when the data was coming from a dummy data generator everything worked fine, the AD9361 got booted. An important observation is that when I use the GTPs, the RXUSRCLK2 output (to which the data going into the block design is synchronized) is being interrupted when I run the software of the microblaze.
What could be the cause of this?
The question is re posted in FPGA forum. Please remove this. Thanks