AD9361 maximum clock rates


I have a question about setting AD9361 clock rates for  TX/RX signal paths and maximum clock rates allowed. From this link I read that maximum clock rate should never exceed 640MHz. However when I look at the ADI No-OS source code in github I find a line where clock rate is more than 900MHz (here, lines 113 and 114). Also in the same source code little bit down below the structures AD9361_TXFIRConfig and AD9361_RXFIRConfig are defined with all clock rates ste to zero (here, lines 338, 363). Why is that and what kind of an effect does this have?

Thank you!