question about ad9361 EN_AGC

Hi ad9361 experts:

     I am using ad9361. I use the FAGC with baseband controls the EN_AGC pin. I use the vivado to observe the control output pins status. Sometime, even the baseband has already pull high the EN_AGC pin, FAGC is still in lock status. Why? The connection between the FPGA and AD9361 is right, because it can unlock in most conditions when the baseband pull the EN_AGC pin high. Can you please give me some suggestion about the situation of ad9361 falis to unlock even the EN_AGC is already high?

  Thanks a lot.



edit
[edited by: xiji at 2:11 AM (GMT 0) on 2 Aug 2019]