AD9364 timing analysis issues

Hello,

We use a system with ad9361, based on nO-OS library 2016.

Recently we updated our system as following:

1. changed hardware from ad9361 to ad9361

2. moved to library 2018 r1 (from 2016)

The library works well, except for the analysis timing which we suspect that does not do what we expected , as I will describe now:

ad9361_dig_interface_timing_analysis routine (with slight change so that it prints the value) , we get the same value for every element in matrix (for example, all "1" or all "2"), yet when we did it with our previous system (ad9361) it gave different values for each element:

NEW ad9364 system

==============


%dc_calib
2 channels, hdl: 0x90062
CLK: 4092000 Hz 'o' = PASS
DC0:1:2:3:4:5:6:7:8:9:a:b:c:d:e:f:
0:2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
1:2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
2:2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
3:2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
4:2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
5:2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
6:2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
7:2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
8:2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
9:2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
a:2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
b:2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
c:2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
d:2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
e:2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
f:2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2

help : Displays this screen
Type 'help command', '? command' or 'command ?' to see extended information about 'command'

previous ad9361 system

==================

%dc_calib
CLK: 61440000 Hz 'o' = PASS
DC0:1:2:3:4:5:6:7:8:9:a:b:c:d:e:f:
0:0 0 0 0 0 4 1 2 6 0 0 0 0 0 0 1
1:2 0 0 0 0 0 0 1 2 2 0 0 0 0 0 4
2:2 6 4 0 0 0 0 0 2 2 2 4 0 0 0 0
3:1 2 2 0 0 0 0 0 4 1 2 6 0 0 0 0
4:0 1 2 2 4 0 0 0 0 0 2 2 2 4 0 0
5:0 4 1 2 2 0 0 0 0 0 4 1 2 6 0 0
6:0 0 4 1 2 6 0 0 0 0 0 4 2 2 2 0
7:0 0 0 4 1 2 6 0 0 0 0 0 4 1 2 4
8:0 0 0 0 4 1 2 2 0 0 0 0 0 4 1 2
9:0 0 0 0 0 4 1 2 6 0 0 0 0 0 4 1
a:6 0 0 0 0 0 4 1 2 6 4 0 0 0 0 4
b:2 6 0 0 0 0 0 4 1 2 4 0 0 0 0 0
c:1 2 6 0 0 0 0 0 4 2 2 2 0 0 0 0
d:4 1 2 6 0 0 0 0 0 4 1 2 6 0 0 0
e:0 4 2 2 6 0 0 0 0 0 4 2 2 6 0 0
f:0 0 4 1 2 4 0 0 0 0 0 4 2 2 4 0

The next thing we did, is walking over the modifications we did in the library, but aside of slight changes there are none,

We then enabled all printing

ad9364_log.txt
%--------------------configuring 0

ad9361_reset: by GPIO
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz--------------------configuring 0

ad9361_setup
ad9361_set_dcxo_tune : coarse 8 fine 5920
ad9361_clk_factor_set_rate: Rate 40000000 Hz Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_set_trx_clock_chain
ad9361_set_trx_clock_chain: 1047552000 32736000 16368000 8184000 4092000 4092000
ad9361_set_trx_clock_chain: 1047552000 32736000 16368000 8184000 4092000 4092000
ad9361_bbpll_set_rate: Rate 1047552006 Hz Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 32736000 Hz Parent Rate 1047552006 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 4092000 Hz Parent Rate 4092000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 4092000 Hz Parent Rate 4092000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rssi_setup
ad9361_auxadc_setup
ad9361_rf_port_setup : INPUT_SELECT 0xc
ad9361_pp_port_setup
ad9361_auxdac_setup
ad9361_auxdac_set DAC1 = 0 mV
ad9361_auxdac_set DAC2 = 0 mV
ad9361_auxadc_setup
ad9361_ctrl_outs_setup
ad9361_gpo_setup
ad9361_set_ref_clk_cycles : ref_clk_hz 80000000
ad9361_txrx_synth_cp_calib : ref_clk_hz 80000000 : is_tx 0
ad9361_txrx_synth_cp_calib : ref_clk_hz 80000000 : is_tx 1
ad9361_rfpll_int_round_rate: Rate 787710000 Hz
ad9361_rfpll_int_round_rate: Rate 787710000 Hz
ad9361_rfpll_int_set_rate: RX Rate 787710000 Hz Parent Rate 80000000 Hz
ad9361_fastlock_prepare: RX Profile 0: Un-Prepare
ad9361_rfpll_vco_init : vco_freq 6301680000 : ref_clk 80000000 : range 2
ad9361_rfpll_vco_init : freq 6270 MHz : index 46
ad9361_load_gt: frequency 1575420000
ad9361_load_gt: frequency 1575420000 (band 1)
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_round_rate: Rate 1200000000 Hz
ad9361_rfpll_int_set_rate: TX Rate 1200000000 Hz Parent Rate 80000000 Hz
ad9361_fastlock_prepare: TX Profile 0: Un-Prepare
ad9361_rfpll_vco_init : vco_freq 9600000000 : ref_clk 80000000 : range 2
ad9361_rfpll_vco_init : freq 9445 MHz : index 12
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_mux_set_parent: index 0Nothing to do, device is already in 5 state
ad9361_trx_ext_lo_control : RX state 0
ad9361_clk_mux_set_parent: index 0Nothing to do, device is already in 5 state
ad9361_trx_ext_lo_control : TX state 0
ad9361_load_mixer_gm_subtable
ad9361_gc_setup
ad9361_rx_bb_analog_filter_calib : rx_bb_bw 2000000 bbpll_freq 1047552006
ad9361_run_calibration: CAL Mask 0x80
ad9361_tx_bb_analog_filter_calib : tx_bb_bw 8000000 bbpll_freq 1047552006
ad9361_run_calibration: CAL Mask 0x40
ad9361_rx_tia_calib : bb_bw_Hz 2000000
ad9361_tx_bb_second_filter_calib : tx_bb_bw 8000000
ad9361_rx_adc_setup : BBBW 1965369 : ADCfreq 32736000c3_msb 0x3 : c3_lsb 0xA : r2346 0x4 : invrc_tconst_1e6 911160, sqrt_inv_rc_tconst_1e3 954scaled_adc_clk_1e6 51150, inv_scaled_adc_clk_1e3 19550tmp_1e3 1078, sqrt_term_1e3 226, min_sqrt_term_1e3 452
ad9361_bb_dc_offset_calib
ad9361_run_calibration: CAL Mask 0x1
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rf_dc_offset_calib : rx_freq 1575419998
ad9361_run_calibration: CAL Mask 0x2
ad9361_tx_quad_calib : bw_tx 8000000 clkrf 4092000 clktf 4092000Tx NCO frequency: 511500 (BW/4: 2000000) txnco_word 3__
ad9361_update_rf_bandwidth: 4092000 4092000
ad9361_rx_bb_analog_filter_calib : rx_bb_bw 2046000 bbpll_freq 1047552006
ad9361_run_calibration: CAL Mask 0x80
ad9361_tx_bb_analog_filter_calib : tx_bb_bw 2046000 bbpll_freq 1047552006
ad9361_run_calibration: CAL Mask 0x40
ad9361_rx_tia_calib : bb_bw_Hz 2046000
ad9361_tx_bb_second_filter_calib : tx_bb_bw 2046000
ad9361_rx_adc_setup : BBBW 2013305 : ADCfreq 32736000c3_msb 0x3 : c3_lsb 0x8 : r2346 0x4 : invrc_tconst_1e6 907456, sqrt_inv_rc_tconst_1e3 952scaled_adc_clk_1e6 51150, inv_scaled_adc_clk_1e3 19550tmp_1e3 1078, sqrt_term_1e3 226, min_sqrt_term_1e3 452
ad9361_run_calibration: CAL Mask 0x10LO leakage: 0 Quadrature Calibration: 0 : rx_phase 21
ad9361_tx_quad_phase_search
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10
ad9361_run_calibration: CAL Mask 0x10__
ad9361_update_rf_bandwidth: 4000000 16000000
ad9361_rx_bb_analog_filter_calib : rx_bb_bw 2000000 bbpll_freq 1047552006
ad9361_run_calibration: CAL Mask 0x80
ad9361_tx_bb_analog_filter_calib : tx_bb_bw 8000000 bbpll_freq 1047552006
ad9361_run_calibration: CAL Mask 0x40
ad9361_rx_tia_calib : bb_bw_Hz 2000000
ad9361_tx_bb_second_filter_calib : tx_bb_bw 8000000
ad9361_rx_adc_setup : BBBW 1965369 : ADCfreq 32736000c3_msb 0x3 : c3_lsb 0xA : r2346 0x4 : invrc_tconst_1e6 911160, sqrt_inv_rc_tconst_1e3 954scaled_adc_clk_1e6 51150, inv_scaled_adc_clk_1e3 19550tmp_1e3 1078, sqrt_term_1e3 226, min_sqrt_term_1e3 452
ad9361_tracking_control : bbdc_track=1, rfdc_track=1, rxquad_track=1
ad9361_pp_port_setup
ad9361_set_tx_atten : attenuation 10000 mdB tx1=1 tx2=0
ad9361_set_tx_atten : attenuation 89750 mdB tx1=0 tx2=1
ad9361_rssi_setup
ad9361_txmon_setupDevice is in 5 state, moving to a
ad9361_dig_tune: freq 61440000 flags 0x3

ad9361_set_tx_atten : attenuation 89750 mdB tx1=1 tx2=1
ad9361_bist_loopback: mode 0
ad9361_bist_prbs: mode 2
ad9361_calculate_rf_clock_chain: requested rate 4092000 TXFIR int 1 RXFIR dec 1 mode Nominal
ad9361_set_trx_clock_chain
ad9361_set_trx_clock_chain: 1047552000 32736000 16368000 8184000 4092000 4092000
ad9361_set_trx_clock_chain: 1047552000 32736000 16368000 8184000 4092000 4092000
ad9361_bbpll_set_rate: Rate 1047552006 Hz Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rssi_setup
ad9361_auxadc_setupDevice is in a state, forcing to 5Device is in 5 state, forcing to aDevice is in a state, forcing to 5Device is in 5 state, forcing to aSAMPL CLK: 4092000 tuning: RX
  0:1:2:3:4:5:6:7:8:9:a:b:c:d:e:f:
0:1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1:1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

ad9361_calculate_rf_clock_chain: requested rate 26214400 TXFIR int 1 RXFIR dec 1 mode Nominal
ad9361_set_trx_clock_chain
ad9361_set_trx_clock_chain: 838860800 209715200 104857600 52428800 26214400 26214400
ad9361_set_trx_clock_chain: 838860800 209715200 104857600 52428800 26214400 26214400
ad9361_bbpll_set_rate: Rate 838860791 Hz Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 209715197 Hz Parent Rate 838860791 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 209715197 Hz Parent Rate 209715197 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 104857598 Hz Parent Rate 209715197 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 104857598 Hz Parent Rate 209715197 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 52428799 Hz Parent Rate 104857598 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 52428799 Hz Parent Rate 104857598 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 26214399 Hz Parent Rate 52428799 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 26214399 Hz Parent Rate 52428799 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 26214399 Hz Parent Rate 26214399 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 26214399 Hz Parent Rate 26214399 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rssi_setup
ad9361_auxadc_setupDevice is in a state, forcing to 5Device is in 5 state, forcing to aDevice is in a state, forcing to 5Device is in 5 state, forcing to aSAMPL CLK: 26214399 tuning: RX
  0:1:2:3:4:5:6:7:8:9:a:b:c:d:e:f:
0:1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1:1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

ad9361_calculate_rf_clock_chain: requested rate 40000000 TXFIR int 1 RXFIR dec 1 mode Nominal
ad9361_set_trx_clock_chain
ad9361_set_trx_clock_chain: 1280000000 320000000 160000000 80000000 40000000 40000000
ad9361_set_trx_clock_chain: 1280000000 320000000 160000000 80000000 40000000 40000000
ad9361_bbpll_set_rate: Rate 1280000000 Hz Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rssi_setup
ad9361_auxadc_setupDevice is in a state, forcing to 5Device is in 5 state, forcing to aDevice is in a state, forcing to 5Device is in 5 state, forcing to aSAMPL CLK: 40000000 tuning: RX
  0:1:2:3:4:5:6:7:8:9:a:b:c:d:e:f:
0:1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1:1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
SAMPL CLK: 40000000 tuning: RX
  0:1:2:3:4:5:6:7:8:9:a:b:c:d:e:f:
0:1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1:1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

ad9361_dig_tune_delay: Tuning RX FAILED!
ad9361_bist_loopback: mode 0Device is in a state, forcing to 5
ad9361_set_tx_atten : attenuation 10000 mdB tx1=1 tx2=0
ad9361_set_tx_atten : attenuation 89750 mdB tx1=0 tx2=1
ad9361_set_trx_clock_chain
ad9361_set_trx_clock_chain: 1047552000 32736000 16368000 8184000 4092000 4092000
ad9361_set_trx_clock_chain: 1047552000 32736000 16368000 8184000 4092000 4092000
ad9361_bbpll_set_rate: Rate 1047552006 Hz Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 32736000 Hz Parent Rate 1047552006 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rssi_setup
ad9361_auxadc_setupDevice is in a state, forcing to 5
ad9361_init : AD936x Rev 2 successfully initialized

ad9361_set_tx_atten : attenuation 10000 mdB tx1=1 tx2=0Ignoring lmt/lpf/digital gains in Single Table mode
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 HzBA1535 C3 Debug:
%
%
%

Please see attached log, but we are not sure that there is any error or warning.

Is it that ad9364 is not supported ?

I would appreciate any suggestion on this topic,

Regards,

ran



more simple
[edited by: ranran at 4:23 AM (GMT 0) on 19 Jun 2019]