I've the AD9364 evaluation kit AD-FMCOMMS4-EBZ and I need to loopback the digital samples coming from RX into the TX digital inputs, without using any external FPGA.
So I need to link RX to TX digital pins, but I've many doubts with the couples to bridge and the connections for EN_AGC, ENABLE and TXNRX.
Also, I see there's several FMC loopback board such as this ( https://fmchub.github.io/projects/FMC_LOOPBACK/Datasheet/FMC_LOOPBACK_MODULE_datasheet.html ) and this ( https://www.xilinx.com/support/documentation/boards_and_kits/xtp090.pdf ) but I don't think they are good for my application.
I wish I can solder directly the testpoint for bridging, but there are no tags in the silkscreen.
Any idea or any schematic for how to implement digital external RX->TX loopback?
Are you planning on fabricating a custom FMC connector with a processor onboard? The AD9364 is pretty unusable without some processor connecting to it.
We're planning to develop a simple single board with AD9364 in loopback mode (RX to TX) for a Transponder/Repeater application.
In this board there will be a small low power MCU, such as STM8 or PIC16, to control/monitor the AD9364 via SPI. If needed, we can put a 32bit MCU instead 8bit.
The board will not have any FMC since the only interfaces with the "external world" will be SPI and RF (coax) only (and power supply of course).
Will be very simple board, without any signal processing, because is not needed.
Please refer to below post,
I've already seen that post but the last question (from "ferdio") in that link is the one I'm looking the answer.
There are several testpoints on evaluation board.
I guess some bridge pairs could be:
TP201/RX_D0_P -> TP207/TX_D0_P
TP202/RX_D0_N -> TP208/RX_D0_N
TP214/RX_D1_P -> TP218/TX_D1_P
TP215/RX_D1_N -> TP219/TX_D1_N
DATA_CLK_P -> FB_CLK_P
DATA_CLK_N -> FB_CLK_N
RX_FRAME_P -> TX_FRAME_P
RX_FRAME_N -> TX_FRAME_N
ENABLE, TXNRN, EN_AGC. Should I loopback them too?
Are possible these direct connections?
Please refer to the below posts