Maximum Bandwidth and Maximum sample rate

I'm using FMCOMMS3 eval board with KC705 FPGA. I want to use whole 56Mhz bandwidth. According to Nyquist theorem, inorder to represent a 56 MHz signal, I need Minimum 112MHSPS(Theoretical) sampling rate. In practical cases it's better to use 2.4*BW(134.4MSPS). But Max sample rate supported by AD9361 is 61.44MSPS. How these numbers will match? Expecting for a positive reply.