Hi,I'm using FMCOMMS3 eval board with KC705 FPGA. I want to use whole 56Mhz bandwidth. According to Nyquist theorem, inorder to represent a 56 MHz signal, I need Minimum 112MHSPS(Theoretical) sampling rate. In practical cases it's better to use 2.4*BW(134.4MSPS). But Max sample rate supported by AD9361 is 61.44MSPS. How these numbers will match? Expecting for a positive reply.
Please refer to below link,
Thanks for the response. Still I have some doubts. If I want to transmit /receive a 56MHz bandwidth signal, will AD9361 is sufficient?. As far as my understanding a sample rate of 61.44MSPS is not sufficient to represent a 56MHz bandwidth signal. Can you please explain the concept of complex bandwidth of 61.44MHz elaborately.
Thanks in advance.
The AD9361 uses a complex converter that generates I and Q which are orthogonal to each other. This means that the digital bandwidth is equal to the sample rate.
The 56 MHz is the analog bandwidth of the filter configuration.
So for a 56MHz analog signal, what should be the minimum sample rate(obviously in digital domain) required?
How digital and analog bandwidth are related?
Please refer to below post,