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Baseband PLL won't lock

On our dev setup using FMCOMMS5, the ADI driver successfully initializes both chips.  On our custom board, whose external reference mimics FMCOMM5, we get Calibration timeouts for the Baseband PLL (0x5E, 0x80) about 50% of the time.  When it DOES lock, other calibrations fail/timeout.  With some strategic printfs, we see illegal programming take place on occasion (i.e., BB PLL divider set to 0).  We also occasionally see the radio ID come back as 0.  Admittedly, this sounds like a SPI issue, but the same driver code works on the dev setup.