PLL cal + lock times depend on the configuration of the chip.
Below are examples of cal +lock times:
fref TDD FDD
19.2MHz ~105us ~525us
40MHz ~60us ~260us
80MHz ~55us ~140us
If you want faster frequency switching time, then you can use the fast lock feature available in which the previously stored profiles are recalled and hence the frequency change time is reduced to only the synth lock time (typically 15us-20us).
