we are using AD9528 clock chip for generating clocks for ADRV9029 chip and FPGA.
The issue is we are not able to get the output from the clock chip.
we are giving the below inputs for the AD9528 chip
REFA /REFA_N : 30.72MHz.
We are not giving SYSREF.
the PLL's are getting locked but none of the output is generating.
I have attached the error Log below for reference.
Rx lo Frequency in Hz : 781000000
Tx lo Frequency in Hz : 781000000
Orx lo Frequency in Hz : 781000000
Tx attenuation : 20dB
Radio Pin control Mode :0
Powering Off the on board PAs and LNAs
Devices reset is done
Transceiver Vendor Id_0: 56
Transceiver Vendor Id_1: 4
Reading AD9528 device ID : 5
The AD9528_ADDR_STATUS_READBACK0 value is e7
AD9528 PLL1 & PLL2 are locked
JESD reset is done
Loading stream image ...
Stream Image firmware loaded successfully
Loading ARM image ...
ARM Image firmware loaded successfully
ERROR: adi_adrv9025Board_Dispatch:2074 has failed.
TRX Phase 1 failed.
Failed to initialize ADRV9025 Board
ERROR: ADRV9025 Error number 3, Recovery action -2. In file public/src/adi_adrv9025_utilities.c, in function adi_adrv9025_PreMcsInit_NonBroadCast, in line 1687, variable name ((void *)0). Error message CpuBootStatus_e: 6 - Bootup clkgen setup error.
ERROR: ad9528Device Error number 0, Recovery action 0. In file (null), in function (null), in line 0, variable name (null). Error message (null).