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ad9528 reference clock issue

I am using a custom adrv9009 board and a custom zcu102 board. I was reading about the AD9528 and came across this " There are limitations with the default hardware configuration in the scenario where user-desired device frequencies are not related to the onboard 122.88MHz VCXO by a rational fraction" I wanted to know what issues arise if the ref_clk and dev_clk of ad9528 are not related. Because in my design I am using a VCXO which is a little bit off from 122.88 MHz and is 122.89MHz and I am trying to generate a 245.76MHz clock.

  • AD9528 can generate integer multiple of the reference input frequency (122.89 MHz) here in your case and the dev. clk out would be 245.78MHz (20kHz offset). You need to use the use cases that are listed in the GUI and as per those input rates/ frequencies. The Half band filters, all clocks are derived based on the clock frequency. We can not guarantee the performance in this case.