ADRV9026HB EVM less


We are using 13NLS JESD204B profile and have tested data path with LTE waveforms. Since, Balun match is from 2.8 - 6 GHz, I have tested at different frequencies. Please find the attachment of the same. 

EVM is observed less in this platform, while the same on previous platform AD9375 was giving  EVM appx. - 42 dB EVM. Any suggestions on it? TIA

[edited by: rakshi at 4:54 AM (GMT -5) on 30 Jan 2021]
Parents Reply
  • Hi,

    I tried testing the same waveform as above shown using external clock source at 3.5GHz CF, both have same results though.

    1. Other clock source (10MHz) -> SI labs clk module (122.88MHz) -> ADRV9026

    2. Signal analyzer(10MHz) -> SI labs clk module (122.88MHz) -> ADRV9026

    I could see frequency error reduced to Hz but EVM has still not improved (Expected EVM is around -42dB)

    I tried 3dB boost feature and as said in the datasheet there is no impact on EVM. Are there any other ways to improve/test it?

  • 0
    •  Analog Employees 
    on Mar 2, 2021 1:37 PM 1 month ago in reply to rakshi

    Have you measured EVM on evaluation board with same waveform file ? 

    Are you running external LOL tracking cal ? If External LOL tracking is run without proper ORX path and mapping it can degrade performance. Try running without enabling external LOL init and tracking.

    Have you measured phase noise of 122.88 MHz reference (Device clock) at ADRV9026 input ?

    if still improvement is not seen , try giving 122.88 MHz clock directly from a signal generator. 

  • 1. Same waveform file is proven to give -42dB EVM on AD9375, we are testing with 9026 EVAL board + custom FPGA board as of now.

    2.  We have not modified/added anything to the base code related to calibrations. Should we have to integrate/enable any init/tracking calibrations?

    3. Clock is clean and fine, clock source from the signal generator also didn't help. 

    Any further pointers/suggestions to loop upon? Thanks

  • 0
    •  Analog Employees 
    on Mar 3, 2021 8:34 AM 1 month ago in reply to rakshi

    To achieve -42 dB EVM you need to run all init calibration (Including EXT LoL Init) and Tracking calibrations (Including EXT LoL Tracking).

  • Init calibrations

    Channelmask - 0x0F, Calmask is set to 0xF0D37FF -  which is according to latest SW release notes and also as suggested in the ADRV9026 calibrations overview in the design support forum.

    Also, tried calmask - F0D 3FFF - D11 bit set which is Tx LO leakage external initial calibration.

    Tracking calibrations 

    TX/RX QEC,LOL,DPD were enabled with the API function adi_adrv9025_TrackingCalsEnableSet and tried. 

    EVM is observed to be ~ -37.2 dB at 3.5GHz CF in all the cases 

  • 0
    •  Analog Employees 
    on Mar 4, 2021 5:23 PM 1 month ago in reply to rakshi

    we tried the same in our lab at the same frequency of 3.5GHz, and was able to achieve -40dB EVM. Make sure that you are initializing the board at 3.5GHz(same as your operating frequency) and also run external LOL and QEC tracking. 

  • Hi, with the tracking and init calibrations enabled (0xF0D37FF), we could see 4dB significant change in EVM at 800MHz CF(-43 dB), not so much change in the mid range frequencies. As we were checking EVM at 3.5GHz CF, sometimes/some runs now I see -40dB but mostly I had seen till now is around -38dB.

    Did a sweep test across the frequencies, below are the results,

  • 0
    •  Analog Employees 
    on Mar 8, 2021 3:02 PM 1 month ago in reply to rakshi

    Are you using the same HB board for checking the EVM at lower frequencies? The difference in EVM at lower frequencies is because of better LO phase noise at lower frequencies. As asked before, did you try initializing the board with LO frequency set to 3.5GHz(all the init cals enabled), and then check the EVM at 3.5GHz? You should be able to achieve -40dB EVM.

  • Yes using the same HB board. Yes, we are initializing the board with lopll1 and lopll2 frequencies set to 3.5GHz with all the init cals enabled. 

    I didn't understand what you exactly meant by this -> did you try initializing the board with LO frequency set to 3.5GHz(all the init cals enabled)

    Without initializing the LO2 PLL frequency at 3.5G, how could we see the waveform at 3.5G? Sorry if I am missing something., are the board init frequency and LO operating frequency different ?