JESD204b Bring up

Howdy,

I am configuring the ADRV9026 to work with the Xilinx ZCU106 board and am trying to establish the JESD link between the two boards and was wondering where in the initialization sequence I was supposed to bring the different cores out of reset? Where in the ADRV API are their Tx/Rx cores and PHYs brought out of reset? When should I bring my own out of reset?

Parents Reply
  • To add some more information, we are only using the first deframer for Tx1 and Tx2. Our profile looks like below

     {  // deframer[0]
                0,  // enableJesd204C
                0,  // bankId
                1,  // deviceId
                0,  // lane0Id
                4,  // jesd204M
                32,  // jesd204K
                2,  // jesd204F
                16,  // jesd204Np
                0,  // jesd204E
                1,  // scramble
                15,  // deserializerLanesEnabled
                0,  // lmfcOffset
                0,  // syncbOutSelect
                1,  // syncbOutLvdsMode
                0,  // syncbOutLvdsPnInvert
                0,  // syncbOutCmosSlewRate
                0,  // syncbOutCmosDriveLevel
                { // deserializerLaneCrossbar
                    0,  // deframerInput0LaneSel
                    1,  // deframerInput1LaneSel
                    2,  // deframerInput2LaneSel
                    3,  // deframerInput3LaneSel
                },
Children