ADRV9026 channel enable pins recommendations

  • The user can tie all 4 Rx/Tx enable signals to a single Rx and Tx control signal from the FPGA (BBIC side). This will allow the BBIC to control all the 4 Rx/Tx channels simultaneously. ADRV9026 does not have any internal single control signal to control all 4 Tx/Rx channels.
  • The specifications for driving the Tx, Rx and ORx enables can be found in the ADRV9026 datasheet under the section ‘DIGITAL SPECIFICATIONS (CMOS)’. These signals being high-impedance CMOS input require very low current to drive the pins. The datasheet mentions a range of +/- 10 uA of current needed for each of these enable pins.