What are the key specification of ADRV9008/ADRV9009 chip?
Key features are as follows:
Will the ADRV9009 chip support both TDD and FDD operation?
Where can I find datasheet user guide and schematics for ADRV9008-1, ADRV9008-2 and ADRV9009?
What are the evaluation kits for ADRV9008/9?
What all will be in package when I order the ADRV9008/9 evaluation kit?
Linux Driver/IIO (Start with IIO-Scope) : https://wiki.analog.com/resources/eval/user-guides/adrv9009
2. One for Windows-based GUI (ADRV9009-SDCARD)
TES software for "Windows-based GUI": https://www.analog.com/en/license/licensing-agreement/transceiver-evaluation-software.html
Note: the package does not contain the EVAL-TPG-ZYNQ3 motherboard which is necessary for operation and must be ordered separately.
What is the difference between ADRV9009 and ADRV9008-1/2
Is ADRV9009 pin compatible with ADRV9008-1/2?
Where can I get links for ADRV9008/9 evaluation software?
What is the range of the input frequency to the reference clock pin and its requirements?
Does ADRV9008-1, ADRV9008-2 support MC-GSM.
Does ADRV9008-1, ADRV9008-2 and ADRV9009 support internal DPD?
Will ADRV9008-1, ADRV9008-2 and ADRV9009 support 5G?
How many RF synthesizers are on board ADRV9009?
What is a stream processor and what is the purpose of that?
The stream is not limited to path enabling events and can also react to other events such as a GPIO input signal. The stream processor image needs to be changed with every different configuration. It is recommended to use TES GUI and generate stream file for required configuration.
This was added to make sure the signal path is not disrupted when ARM crashes and still the link is available with reduced performance as tracking calibrations are not running.
What is the purpose of ADC stitching in observation receiver?
Can I use ZC706 Xilinx board as my base platform?
FPGA part no.
GTX speed supported (Gb/s)
XC7Z045 FFG 900 -2
XC7Z045 FFG 900 -3
Below is the snippet from datasheet showing supported speed for GTX