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ADRV9009 Fast hop problem advisory

When I apply ADRV9009, the frequency hopping range is required to be from 600MHz to 6000MHz, the frequency hopping step size is 200MHz, and the frequency hopping interval time is required to be within 5ms. I have tested that only TX QEC and LOL are called for calibration each time the frequency hopping time is second level, which is not much different from the initialization time. My questions are as follows:

1. Does ADRV9009 have a pre-calibration mode?  That is, start the calibration once, then just frequency hopping (In fact, I have experimented writing multiple initial frequency points in the external API and only frequency hopping after working, but the verification results show no effect, guess that the internal calibration parameters are only storing a group of data), if so, what is the implementation method?  

2.when THE API calls the TX QEC and LOL calibration instructions separately, are other instructions also called?  If so, how to call the API to get the shortest calibration time?

3.How fast can the hardware implementation time of ADRV9009 TX QEC and LOL calibration be reduced to?

4.Does the ADRV9009 DC tracking calibration cause a transient interruption of the signal link during continuous signal operation?

  • Frequency hop time is typically 60-70usec for ADRV9009 chip. If you are using API mode, then there will be additional SPI read/write time. You can use GPIO mode for frequency hop, for eliminating those additional times.

    We do not have any pre callibration mode for ADRV9009 chip, in which you can store the callibration values beforehand and then just do frequency hopping.

    There is no way to reduce the QEC /LOL cal time. You may eliminate the initial callibration and only keep the QEC/LOL tracking cal enabled throughout the hop(tracking cal alone may take some more time to converge to optimum settings) and then check if the performance is met as per your requirement.

  • Thank you for your answer.

    Yes, in a 200MHz calibration bandwidth can be quickly to the frequency hopping(It also has good mirror image and local vibration leakage performance).

    The above questions need to complement such an application scenario: In the full frequency range of 600MHz-6GHz with a step diameter of 200MHz,after the frequency hopping mirror and local vibration leakage will deteriorate,how to ensure its performance can be completed within 60~70us frequency hopping?

    "in which you can store the callibration values beforehand and then just do frequency hopping",My understanding is that this calibration value is stored in the on-chip ARM FLASH or on-chip register of ADRV9009.If our application is powered on before storing multiple calibration values,So where is this calibration stored?

    If it is stored outside the ADRV9009,How do we read this calibration value for each frequency hop and load it into THE ADRV9009 for the calibration performance of the frequency hop?

    "tracking cal alone may take some more time to converge to optimum settings",How long does it usually take to converge to optimal performance?

  • If it is stored outside the ADRV9009,How do we read this calibration value for each frequency hop and load it into THE ADRV9009 for the calibration performance of the frequency hop?

    There is no way in which you can store the callibration values and use them later for frequency hop. That mode is not supported in this chip.

    If the frequency change is more than 200MHz, then init cals needs to be performed to achieve optimal performance, and it can take more time to hop than 60-70usec if these cals are run.

    There is no way to reduce these internal cal times. If lesser time is required for hoping, you may skip the init cals and run only tracking cals. You may need to compromise with the performance in that case, as it will take more time than init cals to converge to the optimum results.