I'm working in on a custom board with ADRV9009, and continuous SYSREF from FPGA.
Sometime, FramerStatus is 0x27. SYNC pin is always 1. I haven't seen anything special at RX data from ADRV9009 to FPGA.
According to user guide, Bit 1: SYSREF phase error, a new SYSREF had different timing than the first that set the LMFC timing. In continuous SYSREF mode, does this bit make any sense, and what is the first SYSREF that set the LMFC timing?