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9008-2, use external LO, Run initialization calibrations Error,TALISE_waitInitCals() return 5, but errorFlag is 0

Hi, I'm use 9008-2 on my custom board, When I use external LO. Run initialization calibrations, When I run to step 3 in the figure below,TALISE_waitInitCals() return 5,but the errorFlag is 0. TALISE_waitInitCals() return 5,It‘s Seems to refer to TALACT_ERR_RESET_ARM Error. I do not know why?When I use internal LO,TALISE_waitInitCals() No error,is ok。

  • You need to run the initialization callibrations using internal LO. You cannot run the init cals and tracking cals using external LO. Use the API InitRfPllUseExternalLo for enabling external Lo.

  • Thank you for your reply. When I run the initial calibration,I set the value of CalMask of the TALISE_runInitCals() function ,and clean the TAL_TX_LO_LEAKAGE_EXTERNAL Flag; In the talise_config.c file, I set rfPllUseExternalLo = 1,  Use external LO for RF PLL.

    I use no-os driver, API version is 3.6.0.5,I did not find the InitRfPllUseExternalLo API ,The following code is part of my configuration file and initialization process code respectively :

    taliseInit_t talInit_tx =
    {
    	/* SPI settings */
        .spiSettings =
        {
    		.MSBFirst            = 1,  /* 1 = MSBFirst, 0 = LSBFirst */
    		.enSpiStreaming      = 0,  /* Not implemented in ADIs platform layer. SW feature to improve SPI throughput */
    		.autoIncAddrUp       = 1,  /* Not implemented in ADIs platform layer. For SPI Streaming, set address increment direction. 1= next addr = addr+1, 0:addr=addr-1 */
    		.fourWireMode        = 1,  /* 1: Use 4-wire SPI, 0: 3-wire SPI (SDIO pin is bidirectional). NOTE: ADI's FPGA platform always uses 4-wire mode */
    		.cmosPadDrvStrength  = TAL_CMOSPAD_DRV_2X /* Drive strength of CMOS pads when used as outputs (SDIO, SDO, GP_INTERRUPT, GPIO 1, GPIO 0) */
    	},
    
        /* Tx settings */
        .tx =
        {
            .txProfile =
            {
                .dacDiv = 1,                        /* The divider used to generate the DAC clock */
                .txFir =
                {
                    .gain_dB = 6,                        /* filter gain */
                    .numFirCoefs = 40,                    /* number of coefficients in the FIR filter */
                    .coefs = &txFirCoefs[0]
                },
                .txFirInterpolation = 1,                    /* The Tx digital FIR filter interpolation (1,2,4) */
                .thb1Interpolation = 2,                    /* Tx Halfband1 filter interpolation (1,2) */
                .thb2Interpolation = 2,                    /* Tx Halfband2 filter interpolation (1,2)*/
                .thb3Interpolation = 2,                    /* Tx Halfband3 filter interpolation (1,2)*/
                .txInt5Interpolation = 1,                    /* Tx Int5 filter interpolation (1,5) */
                .txInputRate_kHz = 245760,                    /* Primary Signal BW */
                .primarySigBandwidth_Hz = 100000000,    /* The Rx RF passband bandwidth for the profile */
                .rfBandwidth_Hz = 225000000,            /* The Tx RF passband bandwidth for the profile */
                .txDac3dBCorner_kHz = 225000,                /* The DAC filter 3dB corner in kHz */
                .txBbf3dBCorner_kHz = 113000,                /* The BBF 3dB corner in kHz */
                .loopBackAdcProfile = {212, 140, 175, 90, 1280, 699, 1304, 59, 1343, 33, 913, 27, 48, 48, 34, 192, 0, 0, 0, 0, 48, 0, 7, 6, 42, 0, 7, 6, 42, 0, 25, 27, 0, 0, 25, 27, 0, 0, 165, 44, 31, 905}
            },
            .deframerSel = TAL_DEFRAMER_A,                    /* Talise JESD204b deframer config for the Tx data path */
            .txChannels = TAL_TX1,                            /* The desired Tx channels to enable during initialization */
            .txAttenStepSize = TAL_TXATTEN_0P05_DB,            /* Tx Attenuation step size */
            .tx1Atten_mdB = 5000,                            /* Initial Tx1 Attenuation */
            .tx2Atten_mdB = 0,                            /* Initial Tx2 Attenuation */
            .disTxDataIfPllUnlock = TAL_TXDIS_TX_RAMP_DOWN_TO_ZERO    /* Options to disable the transmit data when the RFPLL unlocks. */
        },
    
    
        /* ObsRx settings */
        .obsRx =
        {
            .orxProfile =
            {
                .rxFir = 
                {
                    .gain_dB = 6,                /* filter gain */
                    .numFirCoefs = 24,            /* number of coefficients in the FIR filter */
                    .coefs = &obsrxFirCoefs[0]
                },
                .rxFirDecimation = 1,            /* Rx FIR decimation (1,2,4) */
                .rxDec5Decimation = 4,            /* Decimation of Dec5 or Dec4 filter (5,4) */
                .rhb1Decimation = 2,            /* RX Half band 1 decimation (1 or 2) */
                .orxOutputRate_kHz = 245760,            /* Rx IQ data rate in kHz */
                .rfBandwidth_Hz = 200000000,    /* The Rx RF passband bandwidth for the profile */
                .rxBbf3dBCorner_kHz = 225000,    /* Rx BBF 3dB corner in kHz */
                .orxLowPassAdcProfile = {185, 141, 172, 90, 1280, 942, 1332, 90, 1368, 46, 1016, 19, 48, 48, 37, 208, 0, 0, 0, 0, 52, 0, 7, 6, 42, 0, 7, 6, 42, 0, 25, 27, 0, 0, 25, 27, 0, 0, 165, 44, 31, 905},
                .orxBandPassAdcProfile = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
                .orxDdcMode = TAL_ORXDDC_DISABLED,   /* ORx DDC mode */
                .orxMergeFilter  = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
            },
            .orxGainCtrl =
            {
                .gainMode = TAL_MGC,
                .orx1GainIndex = 255,
                .orx2GainIndex = 255,
                .orx1MaxGainIndex = 255,
                .orx1MinGainIndex = 195,
                .orx2MaxGainIndex = 255,
                .orx2MinGainIndex = 195
            },
            .framerSel = TAL_FRAMER_A,                /* ObsRx JESD204b framer configuration */
            .obsRxChannelsEnable = TAL_ORX1,//TAL_ORXOFF,        /* The desired ObsRx Channels to enable during initialization */
            .obsRxLoSource = TAL_OBSLO_RF_PLL                /* The ORx mixers can use the TX_PLL */
        },
    
        /* Digital Clock Settings */
        .clocks = 
        {
            .deviceClock_kHz = 122880,            /* CLKPLL and device reference clock frequency in kHz */
            .clkPllVcoFreq_kHz = 9830400,        /* CLKPLL VCO frequency in kHz */
            .clkPllHsDiv = TAL_HSDIV_2P5,            /* CLKPLL high speed clock divider */
            .rfPllUseExternalLo = 1,                /* 1= Use external LO for RF PLL, 0 = use internal LO generation for RF PLL */
            .rfPllPhaseSyncMode = TAL_RFPLLMCS_NOSYNC                /* RFPLL MCS (Phase sync) mode */
        },
    
        /* JESD204B settings */
        .jesd204Settings = 
        {
            /* Framer A settings */
            .framerA = 
            {
                .bankId = 0,                    /* JESD204B Configuration Bank ID -extension to Device ID (Valid 0..15) */
                .deviceId = 0,                    /* JESD204B Configuration Device ID - link identification number. (Valid 0..255) */
                .lane0Id = 0,                    /* JESD204B Configuration starting Lane ID.  If more than one lane used, each lane will increment from the Lane0 ID. (Valid 0..31) */
                .M = 2,                            /* number of ADCs (0, 2, or 4) - 2 ADCs per receive chain */
                .K = 32,                        /* number of frames in a multiframe (default=32), F*K must be a multiple of 4. (F=2*M/numberOfLanes) */
                .F = 8,                            /* F (number of bytes per frame) */
                .Np = 16,                            /* Np (converter sample resolution) */
                .scramble = 1,                    /* scrambling off if framerScramble= 0, if framerScramble>0 scramble is enabled. */
                .externalSysref = 1,            /* 0=use internal SYSREF, 1= use external SYSREF */
                .serializerLanesEnabled = 0x01,    /* serializerLanesEnabled - bit per lane, [0] = Lane0 enabled, [1] = Lane1 enabled */
                .serializerLaneCrossbar = 0xE4,    /* serializerLaneCrossbar */
                .lmfcOffset = 31,                /* lmfcOffset - LMFC offset value for deterministic latency setting */
                .newSysrefOnRelink = 0,            /* newSysrefOnRelink */
                .syncbInSelect = 0,                /* syncbInSelect; */
                .overSample = 0,                    /* 1=overSample, 0=bitRepeat */
                .syncbInLvdsMode = 1,
                .syncbInLvdsPnInvert = 0,
                .enableManualLaneXbar = 0 /* 0=auto, 1=manual */
            },
            /* Framer B settings */
            .framerB = 
            {
                .bankId = 0,                    /* JESD204B Configuration Bank ID -extension to Device ID (Valid 0..15) */
                .deviceId = 0,                    /* JESD204B Configuration Device ID - link identification number. (Valid 0..255) */
                .lane0Id = 0,                    /* JESD204B Configuration starting Lane ID.  If more than one lane used, each lane will increment from the Lane0 ID. (Valid 0..31) */
                .M = 2,                            /* number of ADCs (0, 2, or 4) - 2 ADCs per receive chain */
                .K = 32,                        /* number of frames in a multiframe (default=32), F*K must be a multiple of 4. (F=2*M/numberOfLanes) */
                .F = 0,                            /* F (number of bytes per frame) */
                .Np = 16,                            /* Np (converter sample resolution) */
                .scramble = 1,                    /* scrambling off if framerScramble= 0, if framerScramble>0 scramble is enabled. */
                .externalSysref = 1,            /* 0=use internal SYSREF, 1= use external SYSREF */
                .serializerLanesEnabled = 0x0C,    /* serializerLanesEnabled - bit per lane, [0] = Lane0 enabled, [1] = Lane1 enabled */
                .serializerLaneCrossbar = 0xE4,    /* serializerLaneCrossbar */
                .lmfcOffset = 31,                /* lmfcOffset - LMFC offset value for deterministic latency setting */
                .newSysrefOnRelink = 0,            /* newSysrefOnRelink */
                .syncbInSelect = 1,                /* syncbInSelect; */
                .overSample = 0,                    /* 1=overSample, 0=bitRepeat */
                .syncbInLvdsMode = 1,
                .syncbInLvdsPnInvert = 0,
                .enableManualLaneXbar = 0 /* 0=auto, 1=manual */
            },
            /* Deframer A settings */
            .deframerA =
            {
                .bankId = 0,                    /* bankId extension to Device ID (Valid 0..15) */
                .deviceId = 0,                    /* deviceId  link identification number. (Valid 0..255) */
                .lane0Id = 0,                    /* lane0Id Lane0 ID. (Valid 0..31) */
                .M = 2,                            /* M  number of DACss (0, 2, or 4) - 2 DACs per transmit chain */
                .K = 32,                        /* K  #frames in a multiframe (default=32), F*K=multiple of 4. (F=2*M/numberOfLanes) */
                .scramble = 1,                    /* scramble  scrambling off if scramble= 0 */
                .externalSysref = 1,            /* externalSysref  0= use internal SYSREF, 1= external SYSREF */
                .deserializerLanesEnabled = 0x01,    /* deserializerLanesEnabled  bit per lane, [0] = Lane0 enabled */
                .deserializerLaneCrossbar = 0xE4,    /* deserializerLaneCrossbar */
                .lmfcOffset = 17,                /* lmfcOffset	 LMFC offset value to adjust deterministic latency */
                .newSysrefOnRelink = 1,            /* newSysrefOnRelink */
                .syncbOutSelect = 0,                /* SYNCBOUT0/1 select */
                .Np = 16,                /* Np (converter sample resolution) */
                .syncbOutLvdsMode = 1,
                .syncbOutLvdsPnInvert = 0,
                .syncbOutCmosSlewRate = 0,
                .syncbOutCmosDriveLevel = 0,
                .enableManualLaneXbar = 0 /* 0=auto, 1=manual */
            },
            /* Deframer B settings */
            .deframerB = 
            {
                .bankId = 0,                    /* bankId extension to Device ID (Valid 0..15) */
                .deviceId = 0,                    /* deviceId  link identification number. (Valid 0..255) */
                .lane0Id = 0,                    /* lane0Id Lane0 ID. (Valid 0..31) */
                .M = 0,                            /* M  number of DACss (0, 2, or 4) - 2 DACs per transmit chain */
                .K = 32,                        /* K  #frames in a multiframe (default=32), F*K=multiple of 4. (F=2*M/numberOfLanes) */
                .scramble = 1,                    /* scramble  scrambling off if scramble= 0 */
                .externalSysref = 1,            /* externalSysref  0= use internal SYSREF, 1= external SYSREF */
                .deserializerLanesEnabled = 0x00,    /* deserializerLanesEnabled  bit per lane, [0] = Lane0 enabled */
                .deserializerLaneCrossbar = 0xE4,    /* deserializerLaneCrossbar */
                .lmfcOffset = 0,                /* lmfcOffset	 LMFC offset value to adjust deterministic latency */
                .newSysrefOnRelink = 0,            /* newSysrefOnRelink */
                .syncbOutSelect = 1,                /* SYNCBOUT0/1 select */
                .Np = 16,                /* Np (converter sample resolution) */
                .syncbOutLvdsMode = 1,
                .syncbOutLvdsPnInvert = 0,
                .syncbOutCmosSlewRate = 0,
                .syncbOutCmosDriveLevel = 0,
                .enableManualLaneXbar = 0 /* 0=auto, 1=manual */
            },
            .serAmplitude = 15,                    /* Serializer amplitude setting. Default = 15. Range is 0..15 */
            .serPreEmphasis = 1,                /* Serializer pre-emphasis setting. Default = 1 Range is 0..4 */
            .serInvertLanePolarity = 0,            /* Serializer Lane PN inversion select. Default = 0. Where, bit[0] = 1 will invert lane [0], bit[1] = 1 will invert lane 1, etc. */
            .desInvertLanePolarity = 0,            /* Deserializer Lane PN inversion select.  bit[0] = 1 Invert PN of Lane 0, bit[1] = Invert PN of Lane 1, etc */
            .desEqSetting = 1,                    /* Deserializer Equalizer setting. Applied to all deserializer lanes. Range is 0..4 */
            .sysrefLvdsMode = 1,                /* Use LVDS inputs on Talise for SYSREF */
            .sysrefLvdsPnInvert = 0              /*0= Do not PN invert SYSREF */
        }
    };
    int ADRV9008_Init(taliseDevice_t *talDev)
    {
    	/*Open Talise Hw Device*/
    	talAction = TALISE_openHw(talDev);
    	if(talAction != TALACT_NO_ACTION) {
    		return -1;
    	}
    	
    	/* Toggle RESETB pin on Talise device */
    	talAction = TALISE_resetDevice(talDev);
    	if (talAction != TALACT_NO_ACTION) {
    		return -2;
    	}
    
    	mdelay(100);
    
    	talAction = TALISE_initialize(talDev,p_talInit);
    	if (talAction != TALACT_NO_ACTION) {
    		return -3;
    	}
    
    	/*******************************/
    	/***** CLKPLL Status Check *****/
    	/*******************************/
    	talAction = TALISE_getPllsLockStatus(talDev, &pllLockStatus);
    	if (talAction != TALACT_NO_ACTION) {
    		return -4;
    	}
    
    	/* Assert that Talise CLKPLL is locked */
    	if ((pllLockStatus & 0x01) == 0) {
    		return -5;
    	}
    
        initCalMask = TAL_TX_BB_FILTER | TAL_ADC_TUNER | \
    			TAL_TIA_3DB_CORNER | TAL_DC_OFFSET | TAL_FLASH_CAL | \
    			TAL_PATH_DELAY | TAL_TX_LO_LEAKAGE_INTERNAL | TAL_TX_QEC_INIT \
    			| TAL_LOOPBACK_RX_LO_DELAY | TAL_LOOPBACK_RX_RX_QEC_INIT | \
    			TAL_ORX_QEC_INIT | TAL_TX_DAC;	
    	
    	/**** Prepare Talise Arm binary and Load Arm and	****/
    	/**** Stream processor Binaryes 					****/
    	talAction = TALISE_initArm(talDev, p_talInit);
    	if (talAction != TALACT_NO_ACTION) {
    		return -7;
    	}
    	
    		talAction = TALISE_loadStreamFromBinary(talDev, &streamBinary[0]);
    	if (talAction != TALACT_NO_ACTION) {
    		/*** < User: decide what to do based on Talise recovery action returned > ***/
    		return -8;
    	}
    
    	talAction = TALISE_loadArmFromBinary(talDev, &armBinary[0], count);
    	if (talAction != TALACT_NO_ACTION) {
    		return -9;
    	}
    	
    	talAction = TALISE_verifyArmChecksum(talDev);
    	if (talAction != TAL_ERR_OK) {
    		return -10;
    	}
    	
    		/*******************************/
    	/**Set RF PLL LO Frequencies ***/
    	/*******************************/
    	TALISE_setRfPllLoopFilter(talDev, 300, 3);
    	talAction = TALISE_setRfPllFrequency(talDev, TAL_RF_PLL, 2000000000);
    	if (talAction != TALACT_NO_ACTION) {
    		return -12;
    	}
    	
    	mdelay(200);
    	
    	talAction = TALISE_getPllsLockStatus(talDev, &pllLockStatus);
    	if ((pllLockStatus & 0x07) != 0x07) {
    		return -13;
    	}
    	
    	/**** Run Talise ARM Initialization Calibrations ***/
    	talAction = TALISE_runInitCals(talDev, initCalMask & ~TAL_TX_LO_LEAKAGE_EXTERNAL);
    	if (talAction != TALACT_NO_ACTION) {
    		return -14;
    	}
    	
    	while(1){
    		talAction = TALISE_waitInitCals(talDev, 20000, &errorFlag);
    		if(talAction == TALACT_NO_ACTION)
    			break;
    
    		talAction = TALISE_getInitCalStatus(talDev, &calsSincePowerUp, &calsLastRun, &calsMinimum, &initErrCal, &initErrCode);
    	}
    	
    	.....
    	.....
    	.....
    }

    When I use the internal LO, the initialization process of the 9008-2 is the same as when using the external LO,and the initialization calibration can be completed normally.

  • Run the full initialization of the chip(including init and tracking cals) using internal LO and then  enable external LO and configure the external LO pins in output mode in a separate script. You can use the following sequence for enabling external LO:

    z=0
    y=0
    print Link.Version()
    Link.Talise.RadioOff()
    Link.Talise.SetRfPllFrequency(Talise.PllName.RfPll, 2000000000)
    Link.Talise.SetExtLoOutCfg(0x0001,Link.Talise.ExtLoDiv.RfPllVcoDiv2)
    print Link.Talise.GetExtLoOutCfg(z,y)
    Link.Talise.InitRfPllUseExternalLo(1,1)

    Link.Talise.RadioOn()

  •  

    How can we do this in no-os mode?

    There is no such function as InitRfPllUseExternalLo() in no-os driver?

    And   is there any update on this issue? I am facing the same issue with adrv9009.

    Thanks 

    Bilal

  • Please dont open multiple threads , will be followed here 

     ADRV External LO as Input; procedure 

  •  

    I just wanted to ask those who have already resolved it, because your answer is not sufficient enough.