ADRV9009 profile generator and tx_clk

hello everyone,

I want to set the tx_clk to 30.72MHz and the rx_clk to 61.44MHz, but the porfile doesn't fullfill the request. 

The profile has 61.44MHz for tx_clk and 122.88MHz for rx_clk.

My questions are:

1. Is the clock set to the one I want(tx_clk to 30.72MHz rx_clk to 61.44MHz)to meet the requirements? Is this plan feasible

2. If it is feasible, how can I generate the profies correctly?