Post Go back to editing

ADRV9009 TX Sample Rate

Hello,

I have a two part questions.

I read in one of the forum posts that sample rate must be between 40 - 500 MHz. Is this correct?

2nd question - I'm trying to load one of the existing profiles (Tx_BW100_IR122p88_Rx_BW100_OR122p88_ORx_BW100_OR122p88_DC122p88.txt) and then change the TX Sample Rate down to 12 MHz or a factor of 12 > than 40 MHz. I tried changing TX Input Sample Rate field from Advanced ADRV9009 tab of IIO Osc after loading the profile to 12000 KHz and even 48000 KHz but the value did not stay. The text field is editable but the value always reverts back to 122800 KHz. Do I need to generate my own profile for a lower sample rate. I have already pulled the latest code from github and generated the latest linux kernel.

Thanks.

Parents
  • 1. For TX the max input rate is 491.52 MS/s. I don't believe minimums are specified.

    2. Any changes to sample rate should be applied through a profile. The advanced setting of IIO-Scope will manipulate the device independent of the rules of the profiles (and part). Changes usually will result in the transceiver failing on restart, then IIO-Scope will force a transceiver reboot back to a known working profile. If you want to change one of these settings, create a new profile unless you really know what you are doing.

    -Travis

  • Thanks Travis. I started creating a new profile and found that Profile Configuration Wizard throws and error if Tx Input Sample Rate is < 39.063 MHz. The exact error message I got when I entered 12 MHz is 

    "Tx input rate should be greater than 39.063 Mhz and less than 500 MHz. Tx input rate was 12.00"

    So, I suppose even though datasheet does not state sampling rate limits, the profile wizard checks for them.

  • That's probably the lower limit of the dividers independent of clocking. I'm not totally sure how low the evaluation boards will go.

    Its also good to mention the limitation of the AD9528, which only allows integer multiples of its VCXO. So only certain rates can be selected. See here: https://ez.analog.com/wide-band-rf-transceivers/design-support-ad9371/w/documents/10080/ad9371-evaluation-board-vcxo-selection

    -Travis

  • I tried creating a new profile using Config Wizard for Tx sample rate of 96 MSps. I'm getting an Invalid Profile error messages. I have attached screen shots of my configuration with the error message. I found some BW and Input Rates on page 97 and 98 of the datasheet but I need one a custom one to meet 96 MSps. What should I set my config to meet this rate.

    Thanks.

  • and what is the best strategy to get the droop to pass?

    -Travis

  • Apologies for the delayed response.

    This seems to be a bug in the Filter Wizard tool.

    As a workaround, you can use the attached profile. We used the same config parameters as yours except for AD9528 settings, which you need to manually add.

    <profile Talise version=1 name=Tx_BW78_IR96_Rx_BW58_OR96_ORx_BW78_OR96>
     <clocks>
      <deviceClock_kHz=96000>
      <clkPllVcoFreq_kHz=7680000>
      <clkPllHsDiv=2.0>
     </clocks>
    
     <rx name=Rx 58.00MHz, OutputRate 96.00MHz, TotalDecimation 20>
      <rxChannels=TAL_RX1RX2>
      <rxFirDecimation=2>
      <rxDec5Decimation=5>
      <rhb1Decimation=2>
      <rxOutputRate_kHz=96000>
      <rfBandwidth_Hz=58000000>
      <rxBbf3dBCorner_kHz=100000>
      <rxDdcMode=0>
    
      <rxNcoShifterCfg>
       <bandAInputBandWidth_kHz=0>
       <bandAInputCenterFreq_kHz=0>
       <bandANco1Freq_kHz=0>
       <bandANco2Freq_kHz=0>
       <bandBInputBandWidth_kHz=0>
       <bandBInputCenterFreq_kHz=0>
       <bandBNco1Freq_kHz=0>
       <bandBNco2Freq_kHz=0>
      </rxNcoShifterCfg>
    
      <filter FIR gain_dB=-6 numFirCoefs=72>
      -3
      0
      7
      9
      -6
      -23
      -13
      31
      53
      -1
      -90
      -84
      64
      189
      78
      -211
      -305
      31
      466
      372
      -323
      -807
      -270
      871
      1139
      -189
      -1740
      -1291
      1282
      3014
      902
      -3801
      -5354
      1121
      13710
      23941
      23941
      13710
      1121
      -5354
      -3801
      902
      3014
      1282
      -1291
      -1740
      -189
      1139
      871
      -270
      -807
      -323
      372
      466
      31
      -305
      -211
      78
      189
      64
      -84
      -90
      -1
      53
      31
      -13
      -23
      -6
      9
      7
      0
      -3
      </filter>
    
      <rxAdcProfile num=42>
      241
      124
      167
      90
      1280
      208
      1261
      14
      1344
      8
      1044
      45
      48
      48
      35
      212
      0
      0
      0
      0
      53
      0
      7
      6
      42
      0
      7
      6
      42
      0
      25
      27
      0
      0
      25
      27
      0
      0
      165
      44
      31
      905
      </rxAdcProfile>
     </rx>
    
     <obsRx name=Rx 78.00MHz, OutputRate 96.00MHz, TotalDecimation 20>
      <obsRxChannelsEnable=TAL_ORX1>
      <enAdcStitching=0>
      <rxFirDecimation=2>
      <rxDec5Decimation=5>
      <rhb1Decimation=2>
      <orxOutputRate_kHz=96000>
      <rfBandwidth_Hz=78000000>
      <rxBbf3dBCorner_kHz=225000>
      <orxDdcMode=0>
    
      <filter FIR gain_dB=-6 numFirCoefs=72>
      0
      -1
      2
      2
      -5
      -5
      11
      12
      -21
      -24
      40
      43
      -70
      -75
      116
      124
      -180
      -193
      275
      292
      -408
      -438
      584
      632
      -831
      -911
      1173
      1311
      -1683
      -1940
      2509
      3046
      -4268
      -6035
      9802
      29879
      29879
      9802
      -6035
      -4268
      3046
      2509
      -1940
      -1683
      1311
      1173
      -911
      -831
      632
      584
      -438
      -408
      292
      275
      -193
      -180
      124
      116
      -75
      -70
      43
      40
      -24
      -21
      12
      11
      -5
      -5
      2
      2
      -1
      0
      </filter>
    
      <orxLowPassAdcProfile num=42>
      241
      125
      167
      90
      1280
      208
      1266
      15
      1344
      8
      1044
      45
      48
      48
      35
      212
      0
      0
      0
      0
      53
      0
      7
      6
      42
      0
      7
      6
      42
      0
      25
      27
      0
      0
      25
      27
      0
      0
      165
      44
      31
      905
      </orxLowPassAdcProfile>
    
      <orxBandPassAdcProfile num=42>
      241
      125
      167
      90
      1280
      208
      1266
      15
      1344
      8
      1044
      45
      48
      48
      35
      212
      0
      0
      0
      0
      53
      0
      7
      6
      42
      0
      7
      6
      42
      0
      25
      27
      0
      0
      25
      27
      0
      0
      165
      44
      31
      905
      </orxBandPassAdcProfile>
    
     </obsRx>
    
     <lpbk>
      <rxFirDecimation=2>
      <rhb1Decimation=2>
      <outputRate_kHz=96000>
      <rfBandwidth_Hz=44000000>
      <rxBbf3dBCorner_kHz=225000>
    
      <filter FIR gain_dB=-6 num=72>
      0
      -1
      2
      2
      -5
      -5
      11
      12
      -21
      -24
      40
      43
      -70
      -75
      116
      124
      -180
      -193
      275
      292
      -408
      -438
      584
      632
      -831
      -911
      1173
      1311
      -1683
      -1940
      2509
      3046
      -4268
      -6035
      9802
      29879
      29879
      9802
      -6035
      -4268
      3046
      2509
      -1940
      -1683
      1311
      1173
      -911
      -831
      632
      584
      -438
      -408
      292
      275
      -193
      -180
      124
      116
      -75
      -70
      43
      40
      -24
      -21
      12
      11
      -5
      -5
      2
      2
      -1
      0
      </filter>
    
      <lpbkAdcProfile num=42>
      241
      125
      167
      90
      1280
      208
      1266
      15
      1344
      8
      1044
      45
      48
      48
      35
      212
      0
      0
      0
      0
      53
      0
      7
      6
      42
      0
      7
      6
      42
      0
      25
      27
      0
      0
      25
      27
      0
      0
      165
      44
      31
      905
      </lpbkAdcProfile>
     </lpbk>
    
     <tx name=Tx 78.00MHz, InputRate 96.00MHz, TotalInterpolation 20>
      <txChannels=TAL_TX1TX2>
      <dacDiv=1>
      <txFirInterpolation=4>
      <thb1Interpolation=1>
      <thb2Interpolation=1>
      <thb3Interpolation=1>
      <txInt5Interpolation=5>
      <txInputRate_kHz=96000>
      <primarySigBandwidth_Hz=44000000>
      <rfBandwidth_Hz=78000000>
      <txDac3dBCorner_kHz=187000>
      <txBbf3dBCorner_kHz=56000>
    
      <filter FIR gain_dB=-6 numFirCoefs=80>
      32
      -22
      -26
      -33
      -45
      63
      83
      81
      49
      -139
      -175
      -147
      -38
      251
      319
      237
      23
      -426
      -532
      -383
      18
      694
      859
      599
      -112
      -1103
      -1367
      -920
      273
      1752
      2221
      1479
      -524
      -2969
      -3980
      -2745
      1298
      7320
      12999
      16693
      16693
      12999
      7320
      1298
      -2745
      -3980
      -2969
      -524
      1479
      2221
      1752
      273
      -920
      -1367
      -1103
      -112
      599
      859
      694
      18
      -383
      -532
      -426
      23
      237
      319
      251
      -38
      -147
      -175
      -139
      49
      81
      83
      63
      -45
      -33
      -26
      -22
      32
      </filter>
     </tx>
    </profile>
    

  • Once you loaded this profile, you may get JESD config error during the program. To get over that please use below config for JESD Config.

  • I tried using your profile as is but ended up getting an error message "Failed to load profile using the selected file." How and where do I set AD9528 and JESD configurations. I don't see an option in IIO Osc (v 0.10) to configure JESD.

  • I made the modification according to your instructions but I'm always getting "Failed to load profile using the selected file." After I get this error message I'm unable to load existing profile unless I exit out of IIO Osc and recycle power on ZCU102.

  • There is a minimum JESD Lane Rate of 3125Mbps, if you choose your baseband rate too low you can hit this minimum value.

    To fix this you need to decrease the number of JESD204 lanes used. From 2 to 1 or from 4 to 2 on TX. However this requires rebuilding the HDL design and some updates to the JESD parameters which are currently handled in device tree.

    There is a hdl branch which uses one lane it can be found here:

    https://github.com/analogdevicesinc/hdl/commits/dev_adrv9009_less_lanes

    If you need further assistance with the HDL design please post your questions on the HDL forum.

    -Michael

Reply Children
  • Hi Michael,

    What is the vivado version should be used to compile the HDL?

    Henry

  • Hello,

    That branch was built with 2018.2. If you use master, use Vivado 2018.3.

    Some documentation for changing the HDL JESD204B parameters: https://wiki.analog.com/resources/fpga/docs/hdl/generic_jesd_bds

    Regards,

    Adrian

  • Thanks for your reply, Adrian.  I am editing the device tree to match up with the JESD204B parameters in the HDL.  I found the jesd204-framer-a-k parameter in the dtsi file but I don't see any description in the above JEF204B document.  What is this parameter and how to calculate that?  Thanks

  • Hello,

    You should use K=32, the value recommended in the datasheet.

    Regards,

    Adrian

  • Hi Adrian,

    Thanks for your input.  I'm still struggling with the device tree.  This is the device tree modified:

    #include <dt-bindings/iio/frequency/ad9528.h>
    #include <dt-bindings/gpio/gpio.h>
    #include <dt-bindings/interrupt-controller/irq.h>
    
    / {
    	clocks {
    		adrv9009_clkin: clock@0 {
    			compatible = "fixed-clock";
    
    			clock-frequency = <12288000>;
    			clock-output-names = "adrv9009_ext_refclk";
    			#clock-cells = <0>;
    		};
    	};
    };
    
    &fmc_spi {
    
    	clk0_ad9528: ad9528-1@0 {
    		compatible = "adi,ad9528";
    		reg = <0>;
    
    		#address-cells = <1>;
    		#size-cells = <0>;
    
    		spi-max-frequency = <10000000>;
    		//adi,spi-3wire-enable;
    
    		clock-output-names = "ad9528-1_out0", "ad9528-1_out1", "ad9528-1_out2",
    			"ad9528-1_out3", "ad9528-1_out4", "ad9528-1_out5", "ad9528-1_out6",
    			"ad9528-1_out7", "ad9528-1_out8", "ad9528-1_out9", "ad9528-1_out10",
    			"ad9528-1_out11", "ad9528-1_out12", "ad9528-1_out13";
    		#clock-cells = <1>;
    
    		adi,vcxo-freq = <122880000>;
    
    		adi,refa-enable;
    		adi,refa-diff-rcv-enable;
    		adi,refa-r-div = <1>;
    		adi,osc-in-cmos-neg-inp-enable;
    
    		/* PLL1 config */
    		adi,pll1-feedback-div = <4>;
    		adi,pll1-charge-pump-current-nA = <5000>;
    
    		/* PLL2 config */
    		adi,pll2-vco-div-m1 = <3>; /* use 5 for 184320000 output device clock */
    		adi,pll2-n2-div = <10>; /* N / M1 */
    		adi,pll2-r1-div = <1>;
    		adi,pll2-charge-pump-current-nA = <805000>;
    
    		/* SYSREF config */
    		adi,sysref-src = <SYSREF_SRC_INTERNAL>;
    		adi,sysref-pattern-mode = <SYSREF_PATTERN_CONTINUOUS>;
    		adi,sysref-k-div = <512>;
    		adi,sysref-request-enable;
    		adi,sysref-nshot-mode = <SYSREF_NSHOT_4_PULSES>;
    		adi,sysref-request-trigger-mode = <SYSREF_LEVEL_HIGH>;
    
    		adi,rpole2 = <RPOLE2_900_OHM>;
    		adi,rzero = <RZERO_1850_OHM>;
    		adi,cpole1 = <CPOLE1_16_PF>;
    
    		adi,status-mon-pin0-function-select = <1>; /* PLL1 & PLL2 Locked */
    		adi,status-mon-pin1-function-select = <7>; /* REFA Correct */
    
    		ad9528_0_c13: channel@13 {
    			reg = <13>;
    			adi,extended-name = "DEV_CLK";
    			adi,driver-mode = <DRIVER_MODE_LVDS>;
    			adi,divider-phase = <0>;
    			adi,channel-divider = <5>;
    			adi,signal-source = <SOURCE_VCO>;
    		};
    
    		ad9528_0_c1: channel@1 {
    			reg = <1>;
    			adi,extended-name = "FMC_CLK";
    			adi,driver-mode = <DRIVER_MODE_LVDS>;
    			adi,divider-phase = <0>;
    			adi,channel-divider = <5>;
    			adi,signal-source = <SOURCE_VCO>;
    		};
    
    		ad9528_0_c12: channel@12 {
    			reg = <12>;
    			adi,extended-name = "DEV_SYSREF";
    			adi,driver-mode = <DRIVER_MODE_LVDS>;
    			adi,divider-phase = <0>;
    			adi,channel-divider = <5>;
    			adi,signal-source = <SOURCE_SYSREF_VCO>;
    		};
    
    		ad9528_0_c3: channel@3 {
    			reg = <3>;
    			adi,extended-name = "FMC_SYSREF";
    			adi,driver-mode = <DRIVER_MODE_LVDS>;
    			adi,divider-phase = <0>;
    			adi,channel-divider = <5>;
    			adi,signal-source = <SOURCE_SYSREF_VCO>;
    		};
    	};
    
    	trx0_adrv9009: adrv9009-phy@1 {
    		compatible = "adrv9009";
    		reg = <1>;
    
    		#address-cells = <1>;
    		#size-cells = <0>;
    
    		/* SPI Setup */
    		spi-max-frequency = <25000000>;
    
    		interrupt-parent = <&gpio>;
    		interrupts = <129 IRQ_TYPE_EDGE_RISING>;
    
    		/* Clocks */
    		clocks = <&axi_adrv9009_rx_jesd>, <&axi_adrv9009_tx_jesd>,
    			<&axi_adrv9009_rx_os_jesd>, <&clk0_ad9528 13>,
    			<&clk0_ad9528 1>, <&clk0_ad9528 12>, <&clk0_ad9528 3>;
    		clock-names = "jesd_rx_clk", "jesd_tx_clk", "jesd_rx_os_clk",
    			"dev_clk", "fmc_clk", "sysref_dev_clk",
    			"sysref_fmc_clk";
    
    		clock-output-names = "rx_sampl_clk", "rx_os_sampl_clk", "tx_sampl_clk";
    		#clock-cells = <1>;
    
    		/* JESD204 */
    
    		/* JESD204 RX */
    		adi,jesd204-framer-a-bank-id = <1>;
    		adi,jesd204-framer-a-device-id = <0>;
    		adi,jesd204-framer-a-lane0-id = <0>;
    		adi,jesd204-framer-a-m = <4>;
    		adi,jesd204-framer-a-k = <32>;
    		adi,jesd204-framer-a-f = <8>;
    		adi,jesd204-framer-a-np = <16>;
    		adi,jesd204-framer-a-scramble = <1>;
    		adi,jesd204-framer-a-external-sysref = <1>;
    		adi,jesd204-framer-a-serializer-lanes-enabled = <0x01>;
    		adi,jesd204-framer-a-serializer-lane-crossbar = <0xE4>;
    		adi,jesd204-framer-a-lmfc-offset = <31>;
    		adi,jesd204-framer-a-new-sysref-on-relink = <0>;
    		adi,jesd204-framer-a-syncb-in-select = <0>;
    		adi,jesd204-framer-a-over-sample = <0>;
    		adi,jesd204-framer-a-syncb-in-lvds-mode = <1>;
    		adi,jesd204-framer-a-syncb-in-lvds-pn-invert = <0>;
    		adi,jesd204-framer-a-enable-manual-lane-xbar = <0>;
    
    		/* JESD204 OBS */
    		adi,jesd204-framer-b-bank-id = <0>;
    		adi,jesd204-framer-b-device-id = <0>;
    		adi,jesd204-framer-b-lane0-id = <0>;
    		adi,jesd204-framer-b-m = <2>;
    		adi,jesd204-framer-b-k = <32>;
    		adi,jesd204-framer-b-f = <2>;
    		adi,jesd204-framer-b-np = <16>;
    		adi,jesd204-framer-b-scramble = <1>;
    		adi,jesd204-framer-b-external-sysref = <1>;
    		adi,jesd204-framer-b-serializer-lanes-enabled = <0x03>;
    		adi,jesd204-framer-b-serializer-lane-crossbar = <0xE4>;
    		adi,jesd204-framer-b-lmfc-offset = <31>;
    		adi,jesd204-framer-b-new-sysref-on-relink = <0>;
    		adi,jesd204-framer-b-syncb-in-select = <1>;
    		adi,jesd204-framer-b-over-sample = <0>;
    		adi,jesd204-framer-b-syncb-in-lvds-mode = <1>;
    		adi,jesd204-framer-b-syncb-in-lvds-pn-invert = <0>;
    		adi,jesd204-framer-b-enable-manual-lane-xbar = <0>;
    
    		/* JESD204 TX */
    		adi,jesd204-deframer-a-bank-id = <0>;
    		adi,jesd204-deframer-a-device-id = <0>;
    		adi,jesd204-deframer-a-lane0-id = <0>;
    		adi,jesd204-deframer-a-m = <4>;
    		adi,jesd204-deframer-a-k = <32>;
    		adi,jesd204-deframer-a-scramble = <1>;
    		adi,jesd204-deframer-a-external-sysref = <1>;
    		adi,jesd204-deframer-a-deserializer-lanes-enabled = <0x01>;
    		adi,jesd204-deframer-a-deserializer-lane-crossbar = <0xE4>;
    		adi,jesd204-deframer-a-lmfc-offset = <17>;
    		adi,jesd204-deframer-a-new-sysref-on-relink = <0>;
    		adi,jesd204-deframer-a-syncb-out-select = <0>;
    		adi,jesd204-deframer-a-np = <16>;
    		adi,jesd204-deframer-a-syncb-out-lvds-mode = <1>;
    		adi,jesd204-deframer-a-syncb-out-lvds-pn-invert = <0>;
    		adi,jesd204-deframer-a-syncb-out-cmos-slew-rate = <0>;
    		adi,jesd204-deframer-a-syncb-out-cmos-drive-level = <0>;
    		adi,jesd204-deframer-a-enable-manual-lane-xbar = <0>;
    
    		adi,jesd204-ser-amplitude = <15>;
    		adi,jesd204-ser-pre-emphasis = <1>;
    		adi,jesd204-ser-invert-lane-polarity = <0>;
    		adi,jesd204-des-invert-lane-polarity = <0>;
    		adi,jesd204-des-eq-setting = <1>;
    		adi,jesd204-sysref-lvds-mode = <1>;
    		adi,jesd204-sysref-lvds-pn-invert = <0>;
    
    		/* RX */
    
    		adi,rx-profile-rx-fir-gain_db = <(-6)>;
    		adi,rx-profile-rx-fir-num-fir-coefs = <48>;
    		adi,rx-profile-rx-fir-coefs = /bits/ 16 <(-2) (23) (46) (-17) (-104) (10) (208) (23) (-370) (-97) (607) (240) (-942) (-489) (1407) (910) (-2065) (-1637) (3058) (2995) (-4912) (-6526) (9941) (30489) (30489) (9941) (-6526) (-4912) (2995) (3058) (-1637) (-2065) (910) (1407) (-489) (-942) (240) (607) (-97) (-370) (23) (208) (10) (-104) (-17) (46) (23) (-2)>;
    
    		adi,rx-profile-rx-fir-decimation = <2>;
    		adi,rx-profile-rx-dec5-decimation = <4>;
    		adi,rx-profile-rhb1-decimation = <1>;
    		adi,rx-profile-rx-output-rate_khz = <61440>;
    		adi,rx-profile-rf-bandwidth_hz = <50000000>;
    		adi,rx-profile-rx-bbf3d-bcorner_khz = <225000>;
    		adi,rx-profile-rx-adc-profile = /bits/ 16 <182 142 173 90 1280 982 1335 96 1369 48 1012 18 48 48 37 208 0 0 0 0 52 0 7 6 42 0 7 6 42 0 25 27 0 0 25 27 0 0 165 44 31 905>;
    		adi,rx-profile-rx-ddc-mode = <0>;
    
    		adi,rx-nco-shifter-band-a-input-band-width_khz = <0>;
    		adi,rx-nco-shifter-band-a-input-center-freq_khz = <0>;
    		adi,rx-nco-shifter-band-a-nco1-freq_khz = <0>;
    		adi,rx-nco-shifter-band-a-nco2-freq_khz = <0>;
    		adi,rx-nco-shifter-band-binput-band-width_khz = <0>;
    		adi,rx-nco-shifter-band-binput-center-freq_khz = <0>;
    		adi,rx-nco-shifter-band-bnco1-freq_khz = <0>;
    		adi,rx-nco-shifter-band-bnco2-freq_khz = <0>;
    
    		adi,rx-gain-control-gain-mode = <0>;
    		adi,rx-gain-control-rx1-gain-index = <255>;
    		adi,rx-gain-control-rx2-gain-index = <255>;
    		adi,rx-gain-control-rx1-max-gain-index = <255>;
    		adi,rx-gain-control-rx1-min-gain-index = <195>;
    		adi,rx-gain-control-rx2-max-gain-index = <255>;
    		adi,rx-gain-control-rx2-min-gain-index = <195>;
    
    		adi,rx-settings-framer-sel = <0>;
    		adi,rx-settings-rx-channels = <3>;
    
    		/* ORX */
    
    		adi,orx-profile-rx-fir-gain_db = <6>;
    		adi,orx-profile-rx-fir-num-fir-coefs = <24>;
    		adi,orx-profile-rx-fir-coefs = /bits/ 16  <(-10) (7) (-10) (-12) (6) (-12) (16) (-16) (1) (63) (-431) (17235) (-431) (63) (1) (-16) (16) (-12) (6) (-12) (-10) (7) (-10) (0)>;
    		adi,orx-profile-rx-fir-decimation = <1>;
    		adi,orx-profile-rx-dec5-decimation = <4>;
    		adi,orx-profile-rhb1-decimation = <2>;
    		adi,orx-profile-orx-output-rate_khz = <61440>;
    		adi,orx-profile-rf-bandwidth_hz = <50000000>;
    		adi,orx-profile-rx-bbf3d-bcorner_khz = <225000>;
    		adi,orx-profile-orx-low-pass-adc-profile = /bits/ 16  <185 141 172 90 1280 942 1332 90 1368 46 1016 19 48 48 37 208 0 0 0 0 52 0 7 6 42 0 7 6 42 0 25 27 0 0 25 27 0 0 165 44 31 905>;
    		adi,orx-profile-orx-band-pass-adc-profile = /bits/ 16  <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>;
    		adi,orx-profile-orx-ddc-mode = <0>;
    		adi,orx-profile-orx-merge-filter = /bits/ 16  <0 0 0 0 0 0 0 0 0 0 0 0>;
    
    		adi,orx-gain-control-gain-mode = <0>;
    		adi,orx-gain-control-orx1-gain-index = <255>;
    		adi,orx-gain-control-orx2-gain-index = <255>;
    		adi,orx-gain-control-orx1-max-gain-index = <255>;
    		adi,orx-gain-control-orx1-min-gain-index = <195>;
    		adi,orx-gain-control-orx2-max-gain-index = <255>;
    		adi,orx-gain-control-orx2-min-gain-index = <195>;
    
    		adi,obs-settings-framer-sel = <1>;
    		adi,obs-settings-obs-rx-channels-enable = <3>;
    		adi,obs-settings-obs-rx-lo-source = <0>;
    
    		/* TX */
    
    		adi,tx-profile-tx-fir-gain_db = <6>;
    		adi,tx-profile-tx-fir-num-fir-coefs = <40>;
    		adi,tx-profile-tx-fir-coefs = /bits/ 16  <(-14) (5) (-9) (6) (-4) (19) (-29) (27) (-30) (46) (-63) (77) (-103) (150) (-218) (337) (-599) (1266) (-2718) (19537) (-2718) (1266) (-599) (337) (-218) (150) (-103) (77) (-63) (46) (-30) (27) (-29) (19) (-4) (6) (-9) (5) (-14) (0)>;
    
    		adi,tx-profile-dac-div = <1>;
    
    		adi,tx-profile-tx-fir-interpolation = <1>;
    		adi,tx-profile-thb1-interpolation = <2>;
    		adi,tx-profile-thb2-interpolation = <2>;
    		adi,tx-profile-thb3-interpolation = <2>;
    		adi,tx-profile-tx-int5-interpolation = <1>;
    		adi,tx-profile-tx-input-rate_khz = <61440>;
    		adi,tx-profile-primary-sig-bandwidth_hz = <25000000>;
    		adi,tx-profile-rf-bandwidth_hz = <50000000>;
    		adi,tx-profile-tx-dac3d-bcorner_khz = <187000>;
    		adi,tx-profile-tx-bbf3d-bcorner_khz = <56000>;
    		adi,tx-profile-loop-back-adc-profile = /bits/ 16 <206 132 168 90 1280 641 1307 53 1359 28 1039 30 48 48 37 210 0 0 0 0 53 0 7 6 42 0 7 6 42 0 25 27 0 0 25 27 0 0 165 44 31 905>;
    
    		adi,tx-settings-deframer-sel = <0>;
    		adi,tx-settings-tx-channels = <3>;
    		adi,tx-settings-tx-atten-step-size = <0>;
    		adi,tx-settings-tx1-atten_md-b = <10000>;
    		adi,tx-settings-tx2-atten_md-b = <10000>;
    		adi,tx-settings-dis-tx-data-if-pll-unlock = <0>;
    
    		/* Clocks */
    
    		adi,dig-clocks-device-clock_khz = <245760>;
    		adi,dig-clocks-clk-pll-vco-freq_khz = <9830400>;
    		adi,dig-clocks-clk-pll-hs-div = <1>;
    		adi,dig-clocks-rf-pll-use-external-lo = <0>;
    		adi,dig-clocks-rf-pll-phase-sync-mode = <0>;
    
    		/* AGC */
    
    		adi,rxagc-peak-agc-under-range-low-interval_ns = <205>;
    		adi,rxagc-peak-agc-under-range-mid-interval = <2>;
    		adi,rxagc-peak-agc-under-range-high-interval = <4>;
    		adi,rxagc-peak-apd-high-thresh = <39>;
    		adi,rxagc-peak-apd-low-gain-mode-high-thresh = <36>;
    		adi,rxagc-peak-apd-low-thresh = <23>;
    		adi,rxagc-peak-apd-low-gain-mode-low-thresh = <19>;
    		adi,rxagc-peak-apd-upper-thresh-peak-exceeded-cnt = <6>;
    		adi,rxagc-peak-apd-lower-thresh-peak-exceeded-cnt = <3>;
    		adi,rxagc-peak-apd-gain-step-attack = <4>;
    		adi,rxagc-peak-apd-gain-step-recovery = <2>;
    		adi,rxagc-peak-enable-hb2-overload = <1>;
    		adi,rxagc-peak-hb2-overload-duration-cnt = <1>;
    		adi,rxagc-peak-hb2-overload-thresh-cnt = <4>;
    		adi,rxagc-peak-hb2-high-thresh = <181>;
    		adi,rxagc-peak-hb2-under-range-low-thresh = <45>;
    		adi,rxagc-peak-hb2-under-range-mid-thresh = <90>;
    		adi,rxagc-peak-hb2-under-range-high-thresh = <128>;
    		adi,rxagc-peak-hb2-upper-thresh-peak-exceeded-cnt = <6>;
    		adi,rxagc-peak-hb2-lower-thresh-peak-exceeded-cnt = <3>;
    		adi,rxagc-peak-hb2-gain-step-high-recovery = <2>;
    		adi,rxagc-peak-hb2-gain-step-low-recovery = <4>;
    		adi,rxagc-peak-hb2-gain-step-mid-recovery = <8>;
    		adi,rxagc-peak-hb2-gain-step-attack = <4>;
    		adi,rxagc-peak-hb2-overload-power-mode = <1>;
    		adi,rxagc-peak-hb2-ovrg-sel = <0>;
    		adi,rxagc-peak-hb2-thresh-config = <3>;
    
    		adi,rxagc-power-power-enable-measurement = <1>;
    		adi,rxagc-power-power-use-rfir-out = <1>;
    		adi,rxagc-power-power-use-bbdc2 = <0>;
    		adi,rxagc-power-under-range-high-power-thresh = <9>;
    		adi,rxagc-power-under-range-low-power-thresh = <2>;
    		adi,rxagc-power-under-range-high-power-gain-step-recovery = <4>;
    		adi,rxagc-power-under-range-low-power-gain-step-recovery = <4>;
    		adi,rxagc-power-power-measurement-duration = <5>;
    		adi,rxagc-power-rx1-tdd-power-meas-duration = <5>;
    		adi,rxagc-power-rx1-tdd-power-meas-delay = <1>;
    		adi,rxagc-power-rx2-tdd-power-meas-duration = <5>;
    		adi,rxagc-power-rx2-tdd-power-meas-delay = <1>;
    		adi,rxagc-power-upper0-power-thresh = <2>;
    		adi,rxagc-power-upper1-power-thresh = <0>;
    		adi,rxagc-power-power-log-shift = <0>;
    
    		adi,rxagc-agc-peak-wait-time = <4>;
    		adi,rxagc-agc-rx1-max-gain-index = <255>;
    		adi,rxagc-agc-rx1-min-gain-index = <195>;
    		adi,rxagc-agc-rx2-max-gain-index = <255>;
    		adi,rxagc-agc-rx2-min-gain-index = <195>;
    		adi,rxagc-agc-gain-update-counter_us = <250>;
    		adi,rxagc-agc-rx1-attack-delay = <10>;
    		adi,rxagc-agc-rx2-attack-delay = <10>;
    		adi,rxagc-agc-slow-loop-settling-delay = <16>;
    		adi,rxagc-agc-low-thresh-prevent-gain = <0>;
    		adi,rxagc-agc-change-gain-if-thresh-high = <1>;
    		adi,rxagc-agc-peak-thresh-gain-control-mode = <1>;
    		adi,rxagc-agc-reset-on-rxon = <0>;
    		adi,rxagc-agc-enable-sync-pulse-for-gain-counter = <0>;
    		adi,rxagc-agc-enable-ip3-optimization-thresh = <0>;
    		adi,rxagc-ip3-over-range-thresh = <31>;
    		adi,rxagc-ip3-over-range-thresh-index = <246>;
    		adi,rxagc-ip3-peak-exceeded-cnt = <4>;
    		adi,rxagc-agc-enable-fast-recovery-loop = <0>;
    
    
    		/* Misc */
    
    		adi,aux-dac-enables = <0x00>; /* Mask */
    
    		adi,aux-dac-vref0 = <3>;
    		adi,aux-dac-resolution0 = <0>;
    		adi,aux-dac-values0 = <0>;
    		adi,aux-dac-vref1 = <3>;
    		adi,aux-dac-resolution1 = <0>;
    		adi,aux-dac-values1 = <0>;
    		adi,aux-dac-vref2 = <3>;
    		adi,aux-dac-resolution2 = <0>;
    		adi,aux-dac-values2 = <0>;
    		adi,aux-dac-vref3 = <3>;
    		adi,aux-dac-resolution3 = <0>;
    		adi,aux-dac-values3 = <0>;
    		adi,aux-dac-vref4 = <3>;
    		adi,aux-dac-resolution4 = <0>;
    		adi,aux-dac-values4 = <0>;
    		adi,aux-dac-vref5 = <3>;
    		adi,aux-dac-resolution5 = <0>;
    		adi,aux-dac-values5 = <0>;
    		adi,aux-dac-vref6 = <3>;
    		adi,aux-dac-resolution6 = <0>;
    		adi,aux-dac-values6 = <0>;
    		adi,aux-dac-vref7 = <3>;
    		adi,aux-dac-resolution7 = <0>;
    		adi,aux-dac-values7 = <0>;
    		adi,aux-dac-vref8 = <3>;
    		adi,aux-dac-resolution8 = <0>;
    		adi,aux-dac-values8 = <0>;
    		adi,aux-dac-vref9 = <3>;
    		adi,aux-dac-resolution9 = <0>;
    		adi,aux-dac-values9 = <0>;
    		adi,aux-dac-vref10 = <3>;
    		adi,aux-dac-resolution10 = <0>;
    		adi,aux-dac-values10 = <0>;
    		adi,aux-dac-vref11 = <3>;
    		adi,aux-dac-resolution11 = <0>;
    		adi,aux-dac-values11 = <0>;
    
    		adi,arm-gpio-config-orx1-tx-sel0-pin-gpio-pin-sel = <0>;
    		adi,arm-gpio-config-orx1-tx-sel0-pin-polarity = <0>;
    		adi,arm-gpio-config-orx1-tx-sel0-pin-enable = <0>;
    
    		adi,arm-gpio-config-orx1-tx-sel1-pin-gpio-pin-sel = <0>;
    		adi,arm-gpio-config-orx1-tx-sel1-pin-polarity = <0>;
    		adi,arm-gpio-config-orx1-tx-sel1-pin-enable = <0>;
    		adi,arm-gpio-config-orx2-tx-sel0-pin-gpio-pin-sel = <0>;
    		adi,arm-gpio-config-orx2-tx-sel0-pin-polarity = <0>;
    		adi,arm-gpio-config-orx2-tx-sel0-pin-enable = <0>;
    
    		adi,arm-gpio-config-orx2-tx-sel1-pin-gpio-pin-sel = <0>;
    		adi,arm-gpio-config-orx2-tx-sel1-pin-polarity = <0>;
    		adi,arm-gpio-config-orx2-tx-sel1-pin-enable = <0>;
    		adi,arm-gpio-config-en-tx-tracking-cals-gpio-pin-sel = <0>;
    		adi,arm-gpio-config-en-tx-tracking-cals-polarity = <0>;
    		adi,arm-gpio-config-en-tx-tracking-cals-enable = <0>;
    
    		adi,orx-lo-cfg-disable-aux-pll-relocking = <0>;
    		adi,orx-lo-cfg-gpio-select = <19>;
    
    		adi,fhm-config-fhm-gpio-pin = <0>;
    		adi,fhm-config-fhm-min-freq_mhz = <2400>;
    		adi,fhm-config-fhm-max-freq_mhz = <2500>;
    
    		adi,fhm-mode-fhm-enable = <0>;
    		adi,fhm-mode-enable-mcs-sync = <0>;
    		adi,fhm-mode-fhm-trigger-mode = <0>;
    		adi,fhm-mode-fhm-exit-mode = <1>;
    		adi,fhm-mode-fhm-init-frequency_hz = <2450000000>;
    
    		adi,rx1-gain-ctrl-pin-inc-step = <1>;
    		adi,rx1-gain-ctrl-pin-dec-step = <1>;
    		adi,rx1-gain-ctrl-pin-rx-gain-inc-pin = <0>;
    		adi,rx1-gain-ctrl-pin-rx-gain-dec-pin = <1>;
    		adi,rx1-gain-ctrl-pin-enable = <0>;
    
    		adi,rx2-gain-ctrl-pin-inc-step = <1>;
    		adi,rx2-gain-ctrl-pin-dec-step = <1>;
    		adi,rx2-gain-ctrl-pin-rx-gain-inc-pin = <3>;
    		adi,rx2-gain-ctrl-pin-rx-gain-dec-pin = <4>;
    		adi,rx2-gain-ctrl-pin-enable = <0>;
    
    		adi,tx1-atten-ctrl-pin-step-size = <0>;
    		adi,tx1-atten-ctrl-pin-tx-atten-inc-pin = <4>;
    		adi,tx1-atten-ctrl-pin-tx-atten-dec-pin = <5>;
    		adi,tx1-atten-ctrl-pin-enable = <0>;
    
    		adi,tx2-atten-ctrl-pin-step-size = <0>;
    		adi,tx2-atten-ctrl-pin-tx-atten-inc-pin = <6>;
    		adi,tx2-atten-ctrl-pin-tx-atten-dec-pin = <7>;
    		adi,tx2-atten-ctrl-pin-enable = <0>;
    
    		adi,tx-pa-protection-avg-duration = <3>;
    		adi,tx-pa-protection-tx-atten-step = <2>;
    		adi,tx-pa-protection-tx1-power-threshold = <4096>;
    		adi,tx-pa-protection-tx2-power-threshold = <4096>;
    		adi,tx-pa-protection-peak-count = <4>;
    		adi,tx-pa-protection-tx1-peak-threshold = <140>;
    		adi,tx-pa-protection-tx2-peak-threshold = <140>;
    	};
    };
    
    

    During bootup, I got error: Tx Profile IQrate and filter settings are not possible with CLKPLL frequency.

    By the way, can you tell me the kernel released for this HDF?

    Thanks,

    Henry