When using the ADRV9009-W/PCBZ with the ZC706 or EVAL-TPG-ZYNQ3 eval boards, is it ok to set Vadj at 1.8V or 3.3V? Or should Vadj be left at the default 2.5V?
From eval board schematic,
VADJ is supplied to VDD_INTERFACE pin of ADRV9009.
CMOS and LVDS supply, 1.8 V to 2.5 V nominal range
When VADJ level is changed, the level of the below pins also changes. The same should be taken care in design for level compatibility.