[ADRV9009] ORx_SEL1 and ORx_SEL0 usage?

Hello,

I have some questions regarding the usage of ORXx_SEL1 and ORXx_SEL0.

As I understand, ORXx_SEL1 and ORXx_SEL0  have two purposes:

- To inform ARM core of ADRV9009 about input of ORX from which TXx.

- To drive the feedback data path by controlling external switches

Is that correct?

---------

Let's say:

If I just need 200 MHz ORX bandwidth, that means I can use both ORX1 and ORX2 during operation (each port is enable at a time). (page 181 - UG1295)

In the case of hard-wiring ORX1 to TX1 and ORX2 to TX2, ORXx_SEL1 and ORXx_SEL0 just have only one purpose:

"To inform ARM core of ADRV9009 about input of ORX from which TXx".

Is that correct?

Thanks in advance.

Trung Nguyen

  • 0
    •  Analog Employees 
    on Dec 14, 2018 12:53 PM over 1 year ago

    Question moved to Design Support adrv9008-1 adrv9008-2 adrv9009 subspace.

    Andrei

  • 0
    •  Analog Employees 
    on Dec 18, 2018 2:30 PM over 1 year ago

    Yes your understanding is correct. If you are not using Observation path for DPD , you may not need ADC stitching and you can connect ORx1 to Tx1 and Orx 2 to Tx2. 

  • Hello Vinod,

    Thanks for your reply. I still have another question regarding this topic.

    We DO use Observation path for DPD. Our TX bandwidth is 100 MHz and DPD works in "smart peaking mode" so the needed bandwidth for ORX is just greater or equal to 1.2 times TX bandwidth. That's why I can operate our DPD core with 200 MHz ORx.

    My plan was:

    • Fix ORXx_SELx (ORX1 to TX1 and ORX2 to TX2)
    • Then use GPIO mode to enable ORX1 and ORX2 according to the requirement from DPD core.

    However, it did not work as my expectation. To be specific, I did following steps

    • Enable TX/RX, ORX in GPIO mode
    • Fix ORx_SELx
    • When TX enable, I enable ORX1 - feedback data from TX1 can be observed at the input of DPD. So, this case was OK
    • Then, I disable ORX1 and enable ORX2:
      • I capture noise data at ORX2 instead of observed data from TX2.

    In conclusion, I think ORX1 and ORX2 are switched successfully. But why could data from TX2 not be observed in ORX2?

    Thank you very much,

    Trung Nguyen

  • Hello ,

    Could you help me to answer the above question?

    I wonder: Does ADRV9009 allow to switch between ORX1 (hard-wired to TX1) and ORX2 (hard-wired to TX2) in DPD operation (bandwidth = 200 MHz)?

    Thanks in advance,

    Trung Nguyen

  • 0
    •  Analog Employees 
    on Jan 11, 2019 7:05 AM over 1 year ago in reply to trungnguyen

    ORX1 hard wired to Tx1 and ORx 2 hardwired to Tx2 will support 200 MHz bandwidth. For bandwidths upto 200 MHz ORx bandwidth you need not do stitching. 

    If you need more than 200MHz bandwidth then you need to feed signal to one ORx and same signal is shared between the 4 ADC's. In this case you need to switch the feedback signal from Tx1 and Tx2 using external switch to one of the ORx path. In below example signal is fed to ORx1.