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ADRV9002 MCS sampling edge

Category: Datasheet/Specs
Product Number: ADRV9002


In UG-1828 (PrC), it is written "MCS pulse signal will be sampled internally by ADRV9001 by the DEV_CLK signal rising or falling edge.". Does it mean the MCS signal is sampled on both clock edges or only one of them? If only one, how to know the one that will be used, and is there a way to change it?