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AD9375, TXPLL Configuration: MYKONOS_waitInitCals() returned an ARM error

Hi!

we have designed a custom board with AD9375 Transceiver, and are facing the below issue in RF PLL TX Configuration,

We are getting an error "MYKONOS_waitInitCals() returned an ARM error" while changing the Transmitter PLL Frequency and re-calibrating it but RX and sniffer PLL frequency is getting updated successfully till 6GHz(using same function as that of TX).

with RF TX PLL configuration, for frequency lesser the 3.25GHz chip is getting calibrated successfully but with the higher frequencies(>3.25GHz) it is throwing the error.
We also tried by changing the calibration timeout, Previously it was 60000ms as given in the user guide (ug-992) and we changed it to 100000ms, but still the same error is observed.

The below error is observed while MYKONOS_waitInitCals() function is being performed,

Error Macro: MYKONOS_ERR_WAIT_INITCALS_ARMERROR
ErrorReturn: 283
ErrorFlag: 0
ErrorCode: 0

MYKONOS_waitInitCals() returned an ARM error
MYKONOS_getInitCalStatus() returned an ARM error while getting the init cal status information

Note: attached error log for your reference.

The following initCalMask are set while changing Frequency, (Same as mentioned in Large frequency step procedure section of UG-992) ,
    TX_QEC_INIT
    LOOPBACK_RX_LO_DELAY
    LOOPBACK_RX_RX_QEC_INIT
    RX_LO_DELAY
    RX_QEC_INIT;

also we tried initCalMask with the below mask values but ended with the same error.
              TX_BB_FILTER
              ADC_TUNER
              TIA_3DB_CORNER
              DC_OFFSET
              TX_ATTENUATION_DELAY
              RX_GAIN_DELAY
              FLASH_CAL
              PATH_DELAY
              LOOPBACK_RX_LO_DELAY
              LOOPBACK_RX_RX_QEC_INIT
              TX_LO_LEAKAGE_INTERNAL
              TX_LO_LEAKAGE_EXTERNAL
              TX_QEC_INIT
              RX_LO_DELAY
              RX_QEC_INIT

The Hardware setup is maintained as TX path left open(Disconnected from PA).
 
Is there any hardware setup / software configuration that needs to be updated to configure the TX LO frequency >3.5GHz?

/************ Transceiver calibration *************/


Read AD9528 PLL Lock Status : PLL locked
JESD core Reset Success
Configuring the AD9375 Transceiver...
(Mykonos_M3.bin) File read completed.
Device Reset success.
Device Init success.
Reading PLL Lock Status success.
CLKPLL Locked

Enable Multichip sync with (enableMcs = 1) success.
Enable Multichip sync with (enableMcs = 0) success.
MCS Status : 0xB
MCS successful

Init Arm success.
Load Arm Binary success.
RX_PLL frequency      : 1330000000 Hz set successfully
TX_PLL frequency      : 1200000000 Hz set successfully
SNIFFER_PLL frequency : 1350000000 Hz set successfully
All PLLs Locked.

Setup GPIO success.
Set Rx1 Manual Gain to 255 gain index success.
Set Rx2 Manual Gain to 255 gain index success.
Set Obs Rx Manual Gain (OBS_RX1_TXLO) to 255 gain index success.
Set Obs Rx Manual Gain (OBS_RX2_TXLO) to 255 gain index success.
Set Obs Rx Manual Gain (OBS_SNIFFER_A) to 255 gain index success.
Set Obs Rx Manual Gain (OBS_SNIFFER_B) to 255 gain index success.
Set Obs Rx Manual Gain (OBS_SNIFFER_C) to 255 gain index success.
Set Tx1 Attenuation to 0 mdB success.
Set Tx2 Attenuation to 0 mdB success.

Calibration without TX_LO_LEAKAGE_EXTERNAL in progress ...
Run initialization calibrations success.
waiting for the initialization calibrations to complete...
Calibrations  without TX_LO_LEAKAGE_EXTERNAL completed successfully

Calibration with TX_LO_LEAKAGE_EXTERNAL in progress ...
Run initialization calibrations success.
waiting for the initialization calibrations to complete...
Calibrations with TX_LO_LEAKAGE_EXTERNAL completed successfully

Enable SYSREF to Rx Framer success.
Enable SYSREF to Obs Rx Framer success.
Disable SYSREF to the transceiver's deframer success.
Reset DeFramer success.
Enable SYSREF to the transceiver's deframer success.
RX Framer Status : 62
OBS Framer Status : 62
Transceiver's Deframer Status : 40
Enable Tracking Calibrations success.
Radio On success.
Set Obs Rx Path Source to OBS_RXOFF success.
Set Obs Rx Path Source to OBS_INTERNALCALS success.
AD9375 Transceiver configured successfully



/**************** Transmitter Frequency 3200MHz ******************/

Enter the TX PLL frequency in Hz: 3200000000

radioOff success
setRfPllFrequency for TX_PLL success
Tx PLL frequency changed to 3200000000 Hz successfully
Clock, Rx and Tx PLLs locked ...
Calibration in progress ...
runInitCals success
waitInitCals success
Calibrations completed successfully
radioOn success
setObsRxPathSource to OBS_INTERNALCALS success



/**************** Transmitter Frequency 3500MHz ******************/

Enter the TX PLL frequency in Hz: 3500000000

radioOff success
setRfPllFrequency for TX_PLL success
Tx PLL frequency changed to 3500000000 Hz successfully
Clock, Rx and Tx PLLs locked ...
Calibration in progress ...
runInitCals success

ErrorReturn: 283

ErrorFlag: 0

ErrorCode: 0

MYKONOS_waitInitCals() returned an ARM error

Thanks in-advance,

Deva

  • Sorry for the delay in response. Somehow missed this post.

    Have you checked the matching for this board? Please check the return loss at the higher frequencies, at which it is failing. RXQEC calibration will not converge because of improper matching of the board.

    Hope you are going to radio off while setting the LO frequency and following the RFPLL frequency change procedure given in UG.

    Can you share the status of the init cals and check which cal is failing using the API MYKONOS_getInitCalStatus