Deframer SYNC signal is toggle


On the custom board, we sometimes happens the deframer link issue.

Please see the FPGA capture status on below picture.

When this issue was happened, sync signal was toggled.
When this issue was not happened, sync signal was always high.

We checked the response of MYKONOS_readDeframerStatus.
When this issue was happened, deframerstatus is 0x69.
When this issue was not happened, deframerstatus is 0x68.

These state (issue is happened or not) is occurred on same board.
When the AD9375 is reset and boot up, it will be in either state.

This file is myk.c on this case.

  • We got the new information.

    1. We confirmed the IRQ detail information using MYKONOS_deframergetIRQ when the issue was happened.
      This status is 0xE.
      It means BADDISP and NIT was detected.
    2. When the issue was happened, we can solve the issue after the MYKONOS_resetDeframer used.
    3. To make sure, our procedure is indicated below.
      1. FPGA configured. Start the Framer and Deframer on FPGA side.
      2. Start the headless.c procedure that is included MYKONOS_resetDeframer.
      3. After the headless.c procedure, Defraemr is reset on FPGA side
      4. We observed the issue case or no issue case.
  • If the SYNC is toggling periodically, then check if the setup and the hold timings are met as per the datasheet. Also check if the device clock is clean and jitter free. Check the signal integrity of the link.