We are going to do MCS for two ADIs and we are going to use this in RRH application.
The reason to raise a request is that we are thinking that MCS should be done after both ADIs comes up and then we can
do single MCS for both ADIs. We are Anding sync signal and giving it to both ADIs besides dev/sysref signal. Is there any other requirements ?
We are taking help from ad9361/adrv9009 for MCS technique.
The MCS procedure and requirements are documented in the user guide for the AD9371: https://www.analog.com/en/design-center/landing-pages/001/integrated-rf-agile-transceiver-design-resources.html
It is very similar to ADRV9009.
We have done MCS on single ADI. I just want to do it when we have two AD9371 on the board. For MIMO, what are the things which we need to take care in this ?
Do we need to call MYKONOS_enableMultichipSync() one by one for each ad9371 or once after all AD9371 come up ?
I just want to know the driver modification when we have more than one AD9371 on the RRH board.
This is not something we have tested with the Linux driver since we have no eval boards with multiple AD9371's onboard.
However, looking at the driver you would have to gate the MCS enable and sysref stages as you cycle through different parts. Since they need to capture sysrefs at the same time to be aligned. Know that this would only align sampling but not phase.
I just want to ask one more thing.
Should we use current ad9371.c driver as it is , to support mimo application where we are using two ad9371 on RRH board OR do we need to modify the existing ad9371 driver ?
You will likely have to modify it, see previous answer.
Is it *viable* to perform MCS sequentially for two ad9371 ? If "yes" then what is the underlined problem in sequential approach if i use it ?
Actions need to be triggered simultaneously across parts, primarily around sysref pulsing, and the chips need to be configured ahead of time together. So you cannot simply run MCS on one chip, then the next. They need to be sequenced together. This is the same for ADRV9009 and AD9361.
I have one doubt which is troubling me when i saw the line 917 of ad9371.c
The jesd specification says that the transmitter sends CGS\K data when the sysref pulse is generated. This is not happening with Ad9371
If this is the behavior in this chip then do i need to provide an additional sysref pulse for framer CGS generation or "continuous sysref" technique handles it?
Moving to transceiver support as this question is more about the API and not the driver.
The link which i have shared belongs to driver only. Please check.
The driver uses the API. The driver simply wraps these calls.
Please refer link establishment section in User guide.