i have read the user guide and also simulated with the matlab tool.
i saw a section on the RFIR that defines the number of taps that are allowed with respect to sampling frequency and dpclk
when i configure the ADI to receive at 30.72 Msps the RFIR is at decimation factor of 4 and im allowed 72 taps.
my question is this:
do i have to use all the 72 taps or can i use 71 for example?
Programmable Receiver Finite Impulse Response (RFIR) FilterThe programmable RFIR filter acts as a decimating filter. The RFIR can decimate by a factor of 1, 2, or 4, or it can be bypassed. The RFIR can use a configurable number of taps from 24 taps to 72 taps in multiples of 24. The RFIR is typically used to compensate for the roll-off of the analog TIA LPF and decimating filters.The maximum number of taps is limited by the FIR clock rate (data processing clock (DPCLK)). The maximum DPCLK is 400 MHz. The DPCLK is the ADC clock rate divided by either 2 or 4 to limit the DPCLK below 400 MHz when the DEC5 and DEC5HR are disabled. The DPCLK is the ADC clock rate divided by 5 or 10 to limit the DPCLK below 400 MHz when DEC5 or DEC5HR are enabled.Maximum Number of Rx FIR Filter Taps = (DPCLK/Rx IQ Data Rate) × 24