AD9375 TDD state

Hi,

We are using AD9375 custom board. We are configuring AD9375 in TDD mode.

API Version of Non Os code used is 1.1.9.3587.

We are able to control output according to enable pin which indicates TDD mode.

When  radio state is read using  MYKONOS_getRadioState API it returns 0x3 which indicates radio is on and it is in FDD mode according to this description.

radioStatus  |  Bitfield
* -------------|------------------
*        [1:0] | State[1:0], 0=POWERUP, 1=READY, 2=INIT, 3=RADIO ON
*        [3:2] | unused
*        [4]   | TDD_nFDD , 1= TDD, 0=FDD
*        [7:5] | unused

mykonosArmGpioConfig_t  structure is modified as shown below.

static mykonosArmGpioConfig_t armGpio =
{
    0,  // useRx2EnablePin; /*!< 0= RX1_ENABLE controls RX1 and RX2, 1 = separate RX1_ENABLE/RX2_ENABLE pins */
    0,  // useTx2EnablePin; /*!< 0= TX1_ENABLE controls TX1 and TX2, 1 = separate TX1_ENABLE/TX2_ENABLE pins */
    1,  // txRxPinMode;     /*!< 0= ARM command mode, 1 = Pin mode to power up Tx/Rx chains */
    0,  // orxPinMode;      /*!< 0= ARM command mode, 1 = Pin mode to power up ObsRx receiver*/

    /*Mykonos ARM input GPIO pins -- Only valid if orxPinMode = 1 */
    0,  // orxTriggerPin; /*!< Select desired GPIO pin (valid 4-15) */
    0,  // orxMode2Pin;   /*!< Select desired GPIO pin (valid 0-18) */
    0,  // orxMode1Pin;   /*!< Select desired GPIO pin (valid 0-18) */
    0,  // orxMode0Pin;   /*!< Select desired GPIO pin (valid 0-18) */

    /* Mykonos ARM output GPIO pins  --  always available, even when pin mode not enabled*/
    16, // rx1EnableAck;  /*!< Select desired GPIO pin (0-15), [4] = Output Enable */
    16, // rx2EnableAck;  /*!< Select desired GPIO pin (0-15), [4] = Output Enable */
    17, // tx1EnableAck;  /*!< Select desired GPIO pin (0-15), [4] = Output Enable */
    17, // tx2EnableAck;  /*!< Select desired GPIO pin (0-15), [4] = Output Enable */
    0,  // orx1EnableAck;  /*!< Select desired GPIO pin (0-15), [4] = Output Enable */
    0,  // orx2EnableAck;  /*!< Select desired GPIO pin (0-15), [4] = Output Enable */
    0,  // srxEnableAck;  /*!< Select desired GPIO pin (0-15), [4] = Output Enable */
    0   // txObsSelect;   /*!< Select desired GPIO pin (0-15), [4] = Output Enable */
    /* When 2Tx are used with only 1 ORx input, this GPIO tells the BBIC which Tx channel is   */
    /* active for calibrations, so BBIC can route correct RF Tx path into the single ORx input*/
};

In MYKONOS_loadArmFromBinary function  MYKONOS_setArmGpioPins , MYKONOS_setArmGpioPins are called to enable TDD mode.

Suggestions would be helpful

Thanks,

sandeep



In MYKONOS_loadArmFromBinary function MYKONOS_setArmGpioPins , MYKONOS_setRadioControlPinMode are called to enable TDD mode
[edited by: san- at 5:36 AM (GMT 0) on 31 May 2019]