I have a customer that has the Xilinx ZC706 board. He has a reference project (hdl+no-os) for one board working with HMC7044 providing the reference clock to the evaluation board, and would now like to achieve a 4x4 system. He has seen the MCS setup shown in the UG-992 has a common clock/sysref generation chip for both devices. However, the evaluation board does not have ports for in/out clock to share a common clock chip for device clock and sysref.
So does AD9371 evaluation boards support 4x4 setup or does it require a custom PCB that is similar to FMCOMMS5?
If the evaluation boards can be used for 4x4, what are modifications or setup required to achieve synchronization on 4x4 setup?
You really need a custom PCB to do this with matched lengths between the parts and the FPGA. The ADRV9371 evaluation boards are not designed for this configuration.
Thanks, is there a reference design that is available or app note for the MCS implementation?
MCS is documented in the user guide, but sorry there are no app notes or reference designs with AD9371 with this feature.