Ad9371 Frequency change and Noise Floor


i am totally new in this field and new some help.
i have 3 question about the ad9371 transceiver ic.
i. How to change the central Frequency in run time and how much time it will take to shift?
ii. what is the noise floor value at RX end at -80 dB, as this ic has sensitivity of -80dB.
iii. How can i reduce the bandwidth (RX side only) without slow down the IQ data rate. (in form at i found that it may be not possible) kindly explain.
i am new to this domain and still learning we are working with a AD9371 no-OS application currently.
thanks in advance

Asad Asif

Parents Reply
  • sir is it possible to re-run this code (present in the ARM processor to change central frequency and run calibrations) from the PL. i mean we are doing most of our work in PL side and PS is only configuring the device. sir what is the best approach for that purpose.

    FPGA related queries are best answered in the FPGA forum. Please post your above query in the FPGA forum .

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