How do these chips simplify frame alignment between ADC/DAC and FPGA? What is the significance of the "device" and "sysref" clocks? What are the purposes of these two types and are there differences in the signals/waveforms?
How do these chips simplify frame alignment between ADC/DAC and FPGA? What is the significance of the "device" and "sysref" clocks? What are the purposes of these two types and are there differences in the signals/waveforms?
A challenge that many face when using a serial data converter is the need to ensure that all data processing comprehends which bit in the ADC output stream is the beginning of a new A to D translation. The HMC7044 and AD9528 are designed to provide two clock signals to each device, referred to as the device clock, provides the source signal for the base functionality of the device (in the ADC it’s typically called the sample clock); these clock signals do not have to be the same frequency. The other provides a system reference source (thus sysref) that provides an indicator to each chip that each device can use as a base for synchronizing. These signals are all the same frequency, which is some integer division factor of all the device clock frequencies. The signals are typically provided at a common logic level, but that is not a pre-requisite.