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6/1/16: Best practices - minimize noise in mixed signal applications

What are some design practices you'd recommend to minimize noise in mixed signal applications (e.g. high speed FPGA next to a 16 Bit ADC/DAC)?

[edited by: lallison at 4:07 PM (GMT -4) on 6 Jun 2022]
  • Digital circuits have very fast rise times and high transient current spikes, due to inductance in the ground plane, the ground surrounding such circuits tends to be fairly noisy. In most cases, it's good enough to consider the ac current path and make sure it wont be flowing in the same ground as your sensitive analog circuits. Personally, I don't tend to advocate for splitting ground planes or anything like that, just good layout partitioning. A nice app note on the subject is AN-1142. Ott's Noise Reduction in Electronic Systems (or now I suppose it's called Electromagnetic Compatibility Engineering) is highly recommended reading on the topic.