5/18/17 In ADF4106, the phase detector frequency = input reference frequency?

Question

In ADF4106, the phase detector frequency = input reference frequency? or the chip uses its own internal clock frequency?

PKusior · Accepted Answer

On behalf of Robert Brennan: The phase detector frequency is derived directly from the reference frequency. There is a R divider on the reference input path. The output of the R divider drives is the phase detector frequency. The R divider can be set to 1, 2, 3, 4… In an integer-N PLL, like the ADF4106, the PFD frequency sets the output frequency resolution. 
 See the highlighted region of the ADF4106: 
 0451.5c3cfdf70c4f518a1baf0f9fcf094e3e.jpg